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Archive for September, 2012

Synopsys: Writing the book on IP

Thursday, September 27th, 2012


Over the last several months, Synopsys has made multiple announcements aggressively proving their ongoing presence in the burgeoning IP market: Silicon IP, Verification IP, and ARM-based design. Meanwhile, through community outreach, Synopsys has also continued to enhance the most important category of intellectual property: students in local schools.


USB [IP Core] combo pack from DCD

Thursday, September 27th, 2012

Article source: DCD 

Digital Core Design, an IP Core provider and System-on-Chip design house from Poland, has introduced a USB [IP Core] combo pack, which consists of Audio, Human Interface Device and Mass Storage platforms. It’s only up to the project criteria, if either a standalone USB Device Controller or a complete set of USB solutions will be implemented in silicon.

The Universal Serial Bus (USB) connects more than computers and peripherals. Some say, that it has the power to connect the whole new digital world. That’s why, a trusted and safe connection is crucial. – Nowadays it’s hard to imagine a digital device without a USB port – no matter if it’s a standard, mini, micro or even a converter – says Jacek Hanke, CEO of Digital Core Design – And for that reason, we introduced the USB [IP Core] combo pack, which is a complete solution for almost all Universal Serial Bus related designs.


Chris Rowen: Tensilica’s rational trajectory

Tuesday, September 18th, 2012


Chris Rowen is Founder and CTO of Tensilica, an IP company based in Silicon Valley. We spoke last week by phone to discuss how an IP company decides what and when to introduce new products.

I first asked to Chris for a brief history of the RISC [Reduced Instruction Set Computing] architecture he is closely associated with, and how that history segued into the founding of Tensilica.


From RISC to Tensilica …

Q: Can you give me a quick overview of the origins of RISC architecture?

Chris Rowen: RISC is a set of ideas that grew up in academia and IBM in response to increased architectures in both the mainframe and microprocessor worlds.

People saw machines with really high hardware costs being built for assembly [language applications]. However, as compiler technology got better, people said: If I want a compiler to run well, I don’t need fancy instructions. I only need a common set of instructions that run really fast. All other complex operations could be composed by the compiler out of these fast, simple operations.

RISC grew out of these compiler technology advances, and a recognition in the VLSI era that there was an opportunity to rethink the process of how the architecture could be put together. (more…)

S2C: FPGA Base prototyping- Download white paper

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