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Reflex CES: Linking IP, FPGAs, and IEDM

Thursday, December 13th, 2012

 

France-based Reflex CES [Custom Embedded Systems] announced this week what the company calls “the industry’s first release of the Reflex CES Aurora-like IP core based on Altera FPGAs. The core enables interoperability between Xilinx Virtex-6 LXT and Altera Stratix IV and Stratix V GX FPGAs.”

Sylvain Neveu, Reflex CES Co-founder and CEO, is quoted: “With our Reflex CES Aurora-like IP core, designers can easily migrate to new FPGA families with minimum risks, reuse their previous designs, and choose the best FPGA technology for their boards and systems using the Aurora protocol.”

So if that’s an Aurora-like IP core, what’s an Aurora IP core? The answer is, it’s from Xilinx:

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Esencia: from services to software

Thursday, December 6th, 2012

 

Last month, Lou Covey posted comments regarding a blog posted here about Esencia Technologies, the company that received Software Best-in-Show at ARM TechCon. He took issue with my suggestion that it was unclear why Esencia received the award.

Covey’s comments prompted my phone call with Karl Kaiser, VP of Engineering at Esencia, who explained: “EScala is a design platform that takes a C algorithm for things like MP3 encoders, and creates an IP block for the design – a reprogrammable core for the target architecture. EScala allows you to generate a core that fits your algorithm.

“At Esencia, we have provided a lot of ASIC design services and wanted to find a way to simplify the traditional RTL flow – architecting, partitioning, implementing, and writing the testbench. EScala is a result of that effort and is unlike anything else on the market.

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Bake sale: CEVA’s unsolicited offer to buy MIPS

Thursday, November 29th, 2012

 

In a move to catch up with industry coverage of CEVA’s unsolicited offer to buy MIPS Technologies, I turned to Yahoo Financials to find out what was going on. What I quickly discovered in looking at Yahoo was that the CEVA/MIPS story has gotten ugly.

I’m among many who have been interested in MIPS over the years for several reasons: a) MIPS used to be on the EDAC Board of Directors in the person of then-MIPS President & CEO John Bourgoin, and b) MIPS was founded by Stanford President John Hennessy.

Now, however, per the Press Release posted on November 28th: “Levi & Korsinsky is investigating the Board of Directors of MIPS Technologies, Inc. for possible breaches of fiduciary duty and other violations of state law in connection with the sale of the Company to Imagination Technologies Group PLC and the sale of the Company’s patents to Allied Security Trust (“AST”).

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ARM TechCon Best-in-Show Software: Esencia Technologies

Thursday, November 22nd, 2012

 

IP provider Esencia Technologies received a Best-in-Show Award in the Software Category at the recent ARM TechCon 2012 in Silicon Valley. It’s not clear what the criteria were for the award, but it was Esencia’s EScala Design Platform that garnered the accolade, according to the company’s website. Based in San Jose and founded in 2006, the company says they focus on delivering “pre-verified IP cores” to their customers.

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ARM: We are the champions of the world

Thursday, November 1st, 2012

 

You didn’t have to crank up Queen to hear the refrain in the background when ARM CEO Warren East stepped on stage in Silicon Valley this morning to deliver his keynote at the 2012 edition of ARM TechCon. No matter how you slice the pie, ARM is the champion of the world. They know it, they know that you and I know it, and we know that they know that we know it.

Yet despite all that knowing, the guys from ARM seem like a pretty likable bunch. A month ago, I heard ARM CTO Mike Muller give the keynote at the Sophia Antipolis Microelectronics Forum, where he left the same impression with his audience on the Cote d’Azure that Warren East left with his audience this morning in the heart of Silicon Valley: ARM puts cooperation above competition, partnering above posturing, and the well-being of the world above the well-being of the bottom line of ARM or the pocketbook any of its employees.

ARM may be the champion of the world, but it’s for a reason. They’re very good at what they do, they’ve had the luck and foresight to be in the right place at the right time over the last 2 decades, and they are as concerned as the rest of us about the plethora [read “billions”] of digital devices descending on the world which threaten to drive us all to the brink of destruction by way of global warming, polluted environs, or both.

Okay, that’s my qualitative take on this morning’s keynote. Following is a more quantitative version.

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MIPI Alliance: specifications for the external interface

Thursday, October 18th, 2012

 

The MIPI Alliance was founded in 2003 by STMicro, ARM, Nokia and TI. In 2004, Intel, Motorola, Samsung and Philips joined. Today, there are over 240 companies in the Alliance, 18 working groups, and over 5000 participating individuals. Following his presentation during the general session at SAME Forum in Sophia Antipolis, I had a chance to speak with STMicro’s Joel Huloux, Chairman of the Board of Directors of the MIPI Alliance.

Huloux differentiated between the work of the MIPI Alliance and OCP-IP: “OCP-IP is more related to the inside of the chip. It is very useful for interconnect when you buy IP to put in your design. If you look at MIPI Alliance, however, we do not deal with internal bus processors, or networks. We deal with the interface which is external to the chip, particularly in a mobile device, the interface between the chip and the display, camera, and so on. There is no competition at all between OCP-IP and MIPI Alliance.”

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SAME Forum: Mike Muller lights the way to 2020

Thursday, October 11th, 2012

 

ARM CTO Mike Muller came to Sophia Antipolis in the South of France on October 2nd and 3rd for three reasons: To visit the 70+ ARM developers who work in the region, to announce the winner of the annual SAME Forum outstanding Startup Award, and to deliver the conference keynote address.

Muller is an extremely affable man and seemed quite delighted to announce the winner of the Startup Panel at the October 2nd conference dinner: the French company ADACSYS. Muller also noted during the award presentation that very early startup ZettICE, a participant in the competition, showed great potential and should continue to pursue their vision.

On Wednesday, October 3rd, Muller gave his keynote address to an absolutely packed auditorium as part of the morning’s events at SAME Forum. It was a reprise of his DAC 2012 keynote address, which was also given to a packed audience back in June in Moscone Center in San Francisco.

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Elsip: Data Management Engine IP

Thursday, October 4th, 2012

 

Swedish startup Elsip launched its first product on October 2nd, the Data Management Engine [DME], which the company says “is a programmable and configurable synthesizable IP block that solves cache coherency, memory consistency, virtual address translation and dynamic memory allocation for distributed, private or shared memories in heterogeneous and homogeneous architectures.”

I spoke with Elsip CEO Adam Edstrom at the Sophia Antipolis Microelectronics Forum in France on October 3rd. He told me Elsip is based on research out of the Royal Institute of Technology in Stockholm, in particular the work of professors Axel Jantsch, Ahmed Hemani, and Zhonghai Lu. The company was incorporated last year, but the patent-pending product has been many years in the making.

Per Edstrom: “The world is going to multicore, but many areas like robotics, embedded systems, and military systems are not using multicore because the demands of shared memory cannot be met. With DME, however, we are providing a scalable solution to the problems that occur when there are lots of cores on a chip, and lots of memory. The user assigns one DME per core and because the DME is programmable with application specific micro-code, when there are multiple kernels trying to access the same memory, problems do not arise.”

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Synopsys: Writing the book on IP

Thursday, September 27th, 2012

 

Over the last several months, Synopsys has made multiple announcements aggressively proving their ongoing presence in the burgeoning IP market: Silicon IP, Verification IP, and ARM-based design. Meanwhile, through community outreach, Synopsys has also continued to enhance the most important category of intellectual property: students in local schools.

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Chris Rowen: Tensilica’s rational trajectory

Tuesday, September 18th, 2012

 

Chris Rowen is Founder and CTO of Tensilica, an IP company based in Silicon Valley. We spoke last week by phone to discuss how an IP company decides what and when to introduce new products.

I first asked to Chris for a brief history of the RISC [Reduced Instruction Set Computing] architecture he is closely associated with, and how that history segued into the founding of Tensilica.

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From RISC to Tensilica …

Q: Can you give me a quick overview of the origins of RISC architecture?

Chris Rowen: RISC is a set of ideas that grew up in academia and IBM in response to increased architectures in both the mainframe and microprocessor worlds.

People saw machines with really high hardware costs being built for assembly [language applications]. However, as compiler technology got better, people said: If I want a compiler to run well, I don’t need fancy instructions. I only need a common set of instructions that run really fast. All other complex operations could be composed by the compiler out of these fast, simple operations.

RISC grew out of these compiler technology advances, and a recognition in the VLSI era that there was an opportunity to rethink the process of how the architecture could be put together. (more…)

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