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IP @ DAC: Design reuse still not for faint of heart

Thursday, April 16th, 2015

 

Building on last year’s success, the 2015 Design Automation Conference in San Francisco is offering even more substantial content in the track centered on silicon IP and design reuse. Reading through the list of topics, speakers, and companies set to be featured across a diverse set of sessions from June 7-9 at Moscone Center, two things are obvious.

One, a lot of work has been done to assemble all of this. And two, it’s possible the thorny issues surrounding IP reuse may never go away: integration, verifying quality, convincing staff to use design blocks that originate outside of the group, and dealing with the massive amounts of data that IP selection and reuse generates.

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DesignWare EV IP: Convolutional Neural Networks at Core of Capabilities

Wednesday, April 1st, 2015

 

Early Monday morning, Synopsys announced several new bits have been added to their impressive bucket of IP blocks, a new family of DesignWare processors targeted at vision applications. With an honorable pedigree – descent from the ARC technology that came to Synopsys via the 2010 acquisition of Virage Logic – the processors announced on March 30th are designed to be embedded in SoCs, specifically to meet a growing need to digitally “distinguish smiles from frowns, faces from cars, baby carriages from trees or dogs, and even sky from ground.”

These needs were articulated in a March 26th phone call with Synopsys Senior Manager of Product Marketing Mike Thompson, who enthusiastically explained, “The vision market will grow dramatically over the next several years. The next 10-to-15 years will be seen as a paradigm-shift period in how we interact with technology.”

That’s why he’s delighted Synopsys will surpass other players in driving that shift: “There are already a few vision processors available [on the market], and they are largely programmable. We took a slightly different approach, however, with the new DesignWare EV Processors we’ve developed.

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DVCon/SNUG: The Old, Old Story of Design by Committee

Tuesday, March 24th, 2015

 

We’re only gifted with so many hours of life here on earth, so why would anyone waste them listening to the same lengthy keynote twice in one month? That was the thought that raced through my mind when Synopsys’ Aart de Geus stepped up onto the stage in front of 500+ SNUG attendees at the Santa Clara Convention Center yesterday morning and clicked on his title foil.

“Shift Left,” it said.

“Oh no,” I said. For pity’s sake, this was the exact same talk co-CEO de Geus offered up less than three weeks ago on March 3rd at DVCon in San Jose. I looked around for the nearest exit.

Then, cooler heads prevailed. Mine.

Wait a minute, I said. Three weeks ago I sat in the back of a ballroom at the DoubleTree, listening over the heads of 350 people at DVCon, and typed everything the good doctor said into my tablet, verbatim. I’ve already done the heavy lifting here, I thought. I’ve got his script on my tablet, I’ve seen the slides, and I’ve heard the jokes.

Does Synopsys believe an entirely different audience attends DVCon than that which attends SNUG? Why else would they present the exact same talk at the two venues? Perhaps no one at SNUG actually does verification? Why not compare the SNUG talk to the one at DVCon?

So, with that much entertainment guaranteed I sat back and enjoyed the show.

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Performance, Security, Behavior: how Silicon Cloud’s driving the IoT

Thursday, February 26th, 2015

 

In a recent phone call, Silicon Cloud co-founder and CEO, Mojy Chian asserted that the IoT has inspired a new set of initiatives from his lively startup enterprise.

“If you look at the Internet of Things in its entirety, it includes the transmission, aggregation, processing, cloud services and so on.” Chain said, “But it all starts with the nodes, the endpoints, which are the sensors.

“Today we are positioning Silicon Cloud to provide a design-enablement infrastructure for the IoT, a large part of which is the chip design. But now we are extending our services to include design tools for sensors, concentrating on the node itself, and providing a complete infrastructure for node design enablement. We don’t design the semiconductor or the sensor, of course. We provide the design enablement for others to use to design these things.”

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DVCon: IP now part of the calculus

Wednesday, January 28th, 2015

 

DVCon is coming up in early March in San Jose and if you’re into IP, you should be there. That was the surprising take-away I stumbled upon this week while interviewing DVCon General Chair Yatin Trivedi and Technical Program Chair Ambar Sarkar. As many of you know, Yatin is Director of Standards and Interoperability Programs at Synopsys and Ambar is Chief Verification Technologist at Paradigm Works, both men throwing long shadows in the deeply technical world of design and verification.

Our interview was taped on the sound stage in the glam new Synopsys building on Middlefield in Mountain View. Yatin works in the just-opened building, but Ambar flew in from his offices in Andover, Massachusetts, for our chat and was lucky enough to get out of Boston before Juno blew in and shut down all flights out of New England.

The three of us sat on director chairs on Monday morning and chatted on film for well over 30 minutes. Pretty darn fun, but also pretty darn informative. Who knew that Yatin and Ambar were so interested in IP, and we’re not just talking here about Verification IP. When I mentioned I’d seen that IP was one of the topic areas set to be showcased at the upcoming DVCon in March, Yatin launched into an enthusiastic endorsement of all things IP.

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eSilicon: Kick the IP before you buy

Thursday, January 15th, 2015

 

In any marketplace, it’s the buyer’s problem to know in advance of a purchase whether the product is worth the money. In the IP marketplace, the problem’s particularly intense, because until the block is operating within the target environment, it’s close to impossible to know if it’s worth the money.

Today eSilicon is offering what appears to be a reasonable solution to the dilemma. Per the company, “now you can get immediate answers to your power, performance or area questions with pre-loaded data for eSilicon memory compilers and I/Os using the eSilicon IP Marketplace environment.”

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Security: The future is dark?

Thursday, January 8th, 2015

 

In October, IPextreme hosted a day-long meeting in San Jose to “Unlock the Mysteries of IP”. The morning started off with an hour-long panel discussion that touched at times on security. Not the security having to do with elusive and dangerous elements in this treacherous world, but that related to the more banal dangers of insurance companies.

In the emerging era of an IoT a’glitter with wearable gadgets for tracking our blood pressure, heartbeat, temperature, calorie consumption, steps per day, hours sleeping, and brain waves – those trendy connected devices pursued and celebrated by technologists on panels everywhere – three problems have emerged.

First, where in heck is all of this data going to be stored? Second, how is it going to be processed and determined to be normal or not? And finally, how can we be guaranteed that all of this data, particularly the abnormal stuff, will not be presented to our insurance companies, or other bureaucracies, without our permissions?

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New Year’s Resolution: Solve 10 Mysteries of IP

Thursday, January 1st, 2015

 

The New Year is upon us and it’s time for resolutions. Here’s an interesting one: Find the answers to 10 simple questions related to the business and technology of IP. The questions may be simple, but the answers probably are not, if they are available at all.

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* How many IP vendors are needed on average today to provide blocks for a typical chip?

* How does one learn how to buy and integrate IP into a design?

* What is a fair price for a block of IP?

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IP Ecosystem: DAC wants You!

Wednesday, December 10th, 2014

 

The powers-that-be at DAC want to hear from you if you’re involved in the IP industry in any way: IP providers, IP tool vendorsIP methodology experts, and IP users of all kinds.

They want all of you and the good news is, it doesn’t matter in which technical niche you play: low-power IP, IP implementation, IP subsystems and integration, verification IP, or IP strategies and management.

Also, because the last few years at DAC have provided powerful proof-of-concept validation that the Design Automation Conference community really wants to talk about IP, the IP Track is clearly now a critical plank in the infrastructure of the conference.

But don’t believe me; believe the DAC Executive Committee: “The IP Track provides an opportunity for experts in the field to deliver presentations and/or poster  sessions on IP-related topics, and to host panels and invited talks on timely IP related issues.”

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Sonics’ Randy Smith: Why Integrity makes IP tick

Thursday, November 20th, 2014

 

Randy Smith bring a lot of humanity to his role as Vice President of Marketing at Sonics, and a lot of frequent flier miles. The day after we spoke by phone last week, he was set to fly to Japan for a week on business. When I asked if Japan was a new destination for him, he laughed.

“I’ve been to Japan over 150 times,” he said, “and because of that, I have lifelong business relationships there, having worked closely with customers, EDA vendors, design services and IP providers. That’s why my business card used to say ‘Randysan Marketing’. I always look forward to going to Japan, because it gives me the opportunity to touch bases with customers there and to [reconnect] with colleagues.”

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