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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

ARM: We are the champions of the world

 
November 1st, 2012 by Peggy Aycinena

You didn’t have to crank up Queen to hear the refrain in the background when ARM CEO Warren East stepped on stage in Silicon Valley this morning to deliver his keynote at the 2012 edition of ARM TechCon. No matter how you slice the pie, ARM is the champion of the world. They know it, they know that you and I know it, and we know that they know that we know it.

Yet despite all that knowing, the guys from ARM seem like a pretty likable bunch. A month ago, I heard ARM CTO Mike Muller give the keynote at the Sophia Antipolis Microelectronics Forum, where he left the same impression with his audience on the Cote d’Azure that Warren East left with his audience this morning in the heart of Silicon Valley: ARM puts cooperation above competition, partnering above posturing, and the well-being of the world above the well-being of the bottom line of ARM or the pocketbook any of its employees.

ARM may be the champion of the world, but it’s for a reason. They’re very good at what they do, they’ve had the luck and foresight to be in the right place at the right time over the last 2 decades, and they are as concerned as the rest of us about the plethora [read “billions”] of digital devices descending on the world which threaten to drive us all to the brink of destruction by way of global warming, polluted environs, or both.

Okay, that’s my qualitative take on this morning’s keynote. Following is a more quantitative version.

Read the rest of ARM: We are the champions of the world

MIPI Alliance: specifications for the external interface

 
October 18th, 2012 by Peggy Aycinena

The MIPI Alliance was founded in 2003 by STMicro, ARM, Nokia and TI. In 2004, Intel, Motorola, Samsung and Philips joined. Today, there are over 240 companies in the Alliance, 18 working groups, and over 5000 participating individuals. Following his presentation during the general session at SAME Forum in Sophia Antipolis, I had a chance to speak with STMicro’s Joel Huloux, Chairman of the Board of Directors of the MIPI Alliance.

Huloux differentiated between the work of the MIPI Alliance and OCP-IP: “OCP-IP is more related to the inside of the chip. It is very useful for interconnect when you buy IP to put in your design. If you look at MIPI Alliance, however, we do not deal with internal bus processors, or networks. We deal with the interface which is external to the chip, particularly in a mobile device, the interface between the chip and the display, camera, and so on. There is no competition at all between OCP-IP and MIPI Alliance.”

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SAME Forum: Mike Muller lights the way to 2020

 
October 11th, 2012 by Peggy Aycinena

ARM CTO Mike Muller came to Sophia Antipolis in the South of France on October 2nd and 3rd for three reasons: To visit the 70+ ARM developers who work in the region, to announce the winner of the annual SAME Forum outstanding Startup Award, and to deliver the conference keynote address.

Muller is an extremely affable man and seemed quite delighted to announce the winner of the Startup Panel at the October 2nd conference dinner: the French company ADACSYS. Muller also noted during the award presentation that very early startup ZettICE, a participant in the competition, showed great potential and should continue to pursue their vision.

On Wednesday, October 3rd, Muller gave his keynote address to an absolutely packed auditorium as part of the morning’s events at SAME Forum. It was a reprise of his DAC 2012 keynote address, which was also given to a packed audience back in June in Moscone Center in San Francisco.

Read the rest of SAME Forum: Mike Muller lights the way to 2020

Elsip: Data Management Engine IP

 
October 4th, 2012 by Peggy Aycinena

Swedish startup Elsip launched its first product on October 2nd, the Data Management Engine [DME], which the company says “is a programmable and configurable synthesizable IP block that solves cache coherency, memory consistency, virtual address translation and dynamic memory allocation for distributed, private or shared memories in heterogeneous and homogeneous architectures.”

I spoke with Elsip CEO Adam Edstrom at the Sophia Antipolis Microelectronics Forum in France on October 3rd. He told me Elsip is based on research out of the Royal Institute of Technology in Stockholm, in particular the work of professors Axel Jantsch, Ahmed Hemani, and Zhonghai Lu. The company was incorporated last year, but the patent-pending product has been many years in the making.

Per Edstrom: “The world is going to multicore, but many areas like robotics, embedded systems, and military systems are not using multicore because the demands of shared memory cannot be met. With DME, however, we are providing a scalable solution to the problems that occur when there are lots of cores on a chip, and lots of memory. The user assigns one DME per core and because the DME is programmable with application specific micro-code, when there are multiple kernels trying to access the same memory, problems do not arise.”

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Synopsys: Writing the book on IP

 
September 27th, 2012 by Peggy Aycinena

Over the last several months, Synopsys has made multiple announcements aggressively proving their ongoing presence in the burgeoning IP market: Silicon IP, Verification IP, and ARM-based design. Meanwhile, through community outreach, Synopsys has also continued to enhance the most important category of intellectual property: students in local schools.

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USB [IP Core] combo pack from DCD

 
September 27th, 2012 by Sanjay Gangal

Article source: DCD 

Digital Core Design, an IP Core provider and System-on-Chip design house from Poland, has introduced a USB [IP Core] combo pack, which consists of Audio, Human Interface Device and Mass Storage platforms. It’s only up to the project criteria, if either a standalone USB Device Controller or a complete set of USB solutions will be implemented in silicon.

The Universal Serial Bus (USB) connects more than computers and peripherals. Some say, that it has the power to connect the whole new digital world. That’s why, a trusted and safe connection is crucial. – Nowadays it’s hard to imagine a digital device without a USB port – no matter if it’s a standard, mini, micro or even a converter – says Jacek Hanke, CEO of Digital Core Design – And for that reason, we introduced the USB [IP Core] combo pack, which is a complete solution for almost all Universal Serial Bus related designs.

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Chris Rowen: Tensilica’s rational trajectory

 
September 18th, 2012 by Peggy Aycinena

Chris Rowen is Founder and CTO of Tensilica, an IP company based in Silicon Valley. We spoke last week by phone to discuss how an IP company decides what and when to introduce new products.

I first asked to Chris for a brief history of the RISC [Reduced Instruction Set Computing] architecture he is closely associated with, and how that history segued into the founding of Tensilica.

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From RISC to Tensilica …

Q: Can you give me a quick overview of the origins of RISC architecture?

Chris Rowen: RISC is a set of ideas that grew up in academia and IBM in response to increased architectures in both the mainframe and microprocessor worlds.

People saw machines with really high hardware costs being built for assembly [language applications]. However, as compiler technology got better, people said: If I want a compiler to run well, I don’t need fancy instructions. I only need a common set of instructions that run really fast. All other complex operations could be composed by the compiler out of these fast, simple operations.

RISC grew out of these compiler technology advances, and a recognition in the VLSI era that there was an opportunity to rethink the process of how the architecture could be put together. Read the rest of Chris Rowen: Tensilica’s rational trajectory

Hal Barbour: Master of the mega-trend

 
August 30th, 2012 by Peggy Aycinena

Hal Barbour is President of CAST, an IP company based on the East Coast. Hal has a tremendous ability to explain the many facets of the industry, and it was a great pleasure to sit down and talk with him this week. When we spoke by phone on August 29th, he had just wrapped up an earlier call with a customer.

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Hal Barbour on All things IP …

Q: How do you make yourself known to customers?

Hal Barbour: We have always put a lot of information in the hands of our customers, but the delivery mechanism today is quite a bit different. We’ve learned to leverage most of the contemporary tools – blogs, online meetings, webinars, shows and press releases. Press releases are just as important as ever, but where we used to send them to a central distribution center and a group of editors, now there are about 15 or 20 various people and outlets who disseminate the information to a much larger population.

Q: And how do working engineers hear about the products?

Hal Barbour: That’s the really interesting thing. Engineers today can easily see press releases directly, plus they have at their disposal a powerful set of search tools to help them get the information they need, so whatever information you’re putting out there, it better be right and it better be credible. If it’s not, engineers have got plenty of other sources to turn to.

And if you’re going to be out there, you better be able to respond to inquiries quickly and rapidly. Ultimately, however, it’s your name and your reputation that sells products. I can’t tell you the number of people who contact us based on our name and reputation.

Q: Isn’t that called ‘word of mouth’?

Hal Barbour: That’s exactly what it is, only it’s even faster today. Spreading the word used to be limited by who you knew, but today with social media and blogs, word of mouth moves at lighting speed and is more important than ever. Even today, though, nothing substitutes for face-to-face contact with the customer.

Read the rest of Hal Barbour: Master of the mega-trend

Warren Savage: the revolutionary in our midst

 
August 23rd, 2012 by Peggy Aycinena

Behind Warren Savage’s calm and courteous demeanor beats the heart of a revolutionary: A guy who not only talks the talk, but walks the walk of growing his beloved IP industry through the most radical of ideas – cooperation.

Warren is the founder and CEO of IPextreme, a Silicon-Valley based company helping other companies commercialize their IP, small nuggets of pure gold that would otherwise enjoy only internal use. With the assist of Warren & Co, that gold is beefed up, intensely documented, and then licensed to users outside the firewall who then have access to robust 3rd-party design blocks, yielding revenue back to the IP developers they would not otherwise enjoy.

So that’s Warren’s business, but what’s really impressive about Warren is the other half of his professional involvement: working through the GSA [Global Semiconductor Alliance] to enhance the well-being of all players in the IP industry, not just his customers. Warren chairs GSA’s Working Group on IP, and leads the Leadership Group subset within that Working Group.

Warren also founded and continues to lead Constellations, a consortium-like group of IP vendors who meet regularly to discuss business issues, develop joint solutions, and host invitation-only events for their customers. The next Constellations event is coming up in early October.

Clearly, Warren Savage is a revolutionary, someone who believes a rising tide raises all boats in the IP industry and acts vigorously on that belief. Warren and I spoke by phone on August 22nd.

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Cosmic Circuits’ announces the silicon availability of MIPI M-PHY in 28nm

 
July 10th, 2012 by Sanjay Gangal

Article source: Cosmic Circuits

Cosmic Circuits, a leading provider of differentiated Analog, Mixed-Signal and Connectivity IP cores, today announced the silicon availability of its MIPI M-PHY solution in 28nm.

Cosmic Circuits offers a broad portfolio of differentiated Analog IP cores in nanometer technology nodes covering Data-Converters, Analog-Front-End platforms for Wireless and Audio, Power-Management, Clocking and MIPI Interfaces.

Cosmic Circuits M-PHY solution supports both the HS-G1 (1.5Gbps) and HS-G2 (3Gbps) modes and is available in multiple process technologies ranging from 85nm to 28nm. The silicon has been characterized across supply, temperature and process corners and detailed characterization reports will be available very soon. Here is a video showcasing Cosmic Circuits validation platform and methodology for the MIPI M-PHY:

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