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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

Remembering Mark Templeton: One of the Greats of IP

 
July 23rd, 2016 by Peggy Aycinena


The semiconductor IP industry is reeling at news of the tragic death of Mark Templeton
while white water kayaking last weekend in Oregon. Well known, widely admired, and held in great esteem for both his intelligence and unassuming style, Templeton will be sorely missed, not just in the IP industry, but across the entire tech sector.

Per the Press Release: “Mark R. Templeton, 57, was a highly respected venture capitalist in Silicon Valley who used his background as an engineer to foster scientific advancement. In his capacity as a director and board member of numerous tech companies and organizations, he was instrumental in driving growth in the intellectual property market through a combination of technical and business innovation.”

Read the rest of Remembering Mark Templeton: One of the Greats of IP

Reaction to ARM’s Deal: W.Savage, D.Kelf, H.Barbour

 
July 21st, 2016 by Peggy Aycinena


Who better qualified to post reactions to this week’s astonishing news
out of Tokyo and Cambridge – SoftBank is buying ARM in an all-cash deal for 24.3 billion British pounds – than the leaders of two highly regarded IP companies and an articulate Brit with total street cred in EDA.

Read the rest of Reaction to ARM’s Deal: W.Savage, D.Kelf, H.Barbour

Kapow Wham Boom: Holy Acquisition, Sir Robin!

 
July 18th, 2016 by Peggy Aycinena


Yep, it’s happened
. More astonishing than Brexit. Faster than a skyrocketing market cap. Stronger than any ties to Merry Old England, Apple, or ESDA. Able to leap over continents in a single bound.

Holy All-Cash-Deal, Sir Robin, ARM’s been bought by SoftBank!

For a mere 24.3 billion pounds.

Read the rest of Kapow Wham Boom: Holy Acquisition, Sir Robin!

Lanza Panel at DAC: Democratization is not Open Source

 
July 14th, 2016 by Peggy Aycinena


Long-time EDA investor Lucio Lanza lead a fascinating, albeit mystifying, discussion
in the DAC Pavilion on Monday, July 6th, in Austin. His panelists included IPextreme’s Warren Savage, Scientific Ventures’ Mark Templeton, and eFabless’ Michael Wishart, with the topic under discussion being open source.

The session was titled “Daring to Move to Open Source” and was described thusly: “The emerging Internet of Things market is destined to upend that time-tested ‘advanced-node’ model, as developers opt for older, less costly process technologies, using commodity design tools and selecting proven IP blocks to quickly and efficiently assemble chips. As demand for IoT devices grows exponentially, might open source EDA tools and IP become viable, or even the winning combination that enables the low-cost design of an IoT SoC?”

Here are some soundbites from the panelists.

Read the rest of Lanza Panel at DAC: Democratization is not Open Source

UK’s ARM: We are all in this Alone together

 
June 23rd, 2016 by Peggy Aycinena


At this writing, midnight is approaching here in California
, it’s June 23rd, and highly anticipated news is arriving out of the UK. It’s Friday morning there and the results of the Should I stay or Should I go referendum have been announced. To the astonishment of some subset of the world, and undoubtedly their stock markets, the UK is leaving the European Union.

And so a page turns, another chapter begins, and now there’s a twist in the plot line that few saw coming. Although it’s a dark and starry night here, the sun is up in the UK and the future looks suddenly different, no matter if you’re standing on the streets of London, York, Edinburgh – or Cambridge.

The very same Cambridge where ARM Ltd. is headquartered.

Read the rest of UK’s ARM: We are all in this Alone together

Menta eFPGA IP: Antidote for evolving Standards and ECOs

 
June 16th, 2016 by Peggy Aycinena


Menta is a French startup, founded in 2007
, that provides embedded FPGA IP for SoCs, ASICs and ASSPs. The company exhibited last week at the Design Automation Conference in Austin and will exhibit next week at the TSMC Technology Workshop in Herzliya.

This month is clearly a busy one for Menta, and for more reasons than just exhibiting in conference venues 7000 miles apart. On June 6th, the company announced its “next generation of embedded programmable logic IP cores for SoCs.”

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CEDA Panel: Covering new ground at DAC 2016

 
June 9th, 2016 by Peggy Aycinena


When SRC’s Bill Joyner took the podium this past Sunday evening at the 53rd DAC in Austin
, he did something that’s never been done before: Present a panel about careers that wasn’t part of a Workshop for Women in EDA.

Up until 7 o’clock on June 5, 2016, a conversation about career perspectives was such a non-technical topic, it could only be found in Marie Pistilli’s beloved workshop, a venue where work/life balance, Academia vs. Industry, and how to promote your brand within the organization were thoroughly discussed every year for 15 years at DAC.

Now IEEE’s Council on EDA, CEDA, has made the bold decision to pick up where Marie’s workshop left off, sponsoring this week’s event and broadening the audience and the appeal.

Joyner had four people on his panel, a generous two hours to hash out various universal questions, and enough of a sense of humor to offer to wear the necktie he’d brought with him to add gravitas, or not to wear the tie to appear hipster and cool. He quickly decided to go without the tie, and the ensuing conversation went something like this.

Read the rest of CEDA Panel: Covering new ground at DAC 2016

DAC 2016: Til the Bagpipes Play

 
June 2nd, 2016 by Peggy Aycinena


The first thing to do on Wednesday at DAC 2016 in Austin 
is take in an hour of the Exhibit Hall. This is the last day for the booths, people are zippy in the morning like horses sensing the stable at the end of their journey, and conversations on the floor are still about the technology. By the end of the afternoon, it’ll be about wistful goodbyes and, “Will we even be here next year when DAC again returns to the Lone Star State?”

Then from 10:30 to noon genuflect to Academia and check out ‘Accelerated Simulation for Circuit Reliability and Stability’. With speakers from Texas A&M, USC, Brown, and Michigan Tech. If you attend, you’ll learn what the future holds for simulation: power supply stability, soft error in logic circuits, thermal noise in ultra-low voltage designs, and the sparsification of spectral graphs used in various design problems. Nobody from industry is speaking, so if you want to get in on the ground floor commercializing some of this stuff, sit in the front row.

Read the rest of DAC 2016: Til the Bagpipes Play

Life is Short: Carpe Eruditio at DAC 2016

 
May 26th, 2016 by Peggy Aycinena


There are clearly a lot of collateral distractions at the Design Automation Conference
: Networking. Social Hours. Parties. Chotzkies. But the real fun at DAC comes from carving time out to attend technical sessions. This is year in Austin, the offerings are particularly rich.

On Sunday, June 5th, my two favorites are: The Workshop on Design Automation for Cyber-Physical Systems, and The Workshop on Computing in Heterogeneous, Autonomous ‘N’ Goal-Oriented Environments. Both of these all-day events feature experts from academia and industry, most speaking for at least 30 minutes. The topics will be very technical and the schedules allow for detailed presentations. Of course, this doesn’t mean the other workshops on Sunday don’t have great merit, but the two I have identified look to be particularly rich opportunities for learning.

Sunday evening, for the first time, there will also be a 2-hour panel focused on Career Perspectives in EDA, a discussion sponsored by CEDA. Although many will be obliged to attend networking dinners on Sunday evening, or will still be busy setting up booths for Monday morning’s Exhibit Hall opening, attending this Career Panel seems an opportunity not to be missed, particularly as it will be moderated by the supremely knowledgeable Bill Joyner from SRC. Admittedly, this is not a technical session, but the implications for the industry are profound. [File under the heading: ‘Concern for an Aging Industry’]

Read the rest of Life is Short: Carpe Eruditio at DAC 2016

Please Crispify: The ESD Alliance System Scaling Working Group

 
May 19th, 2016 by Peggy Aycinena


It’s a poorly kept secret that Bob Smith
was brought in as Executive Director of EDAC last year to shake things up, to breathe new life into the sails of a somewhat becalmed organization. Well, in the category of be careful what you ask for, here’s how things have gone so far:

New companies have joined the consortium, the newest member of the Board of Directors is not a CEO, a plethora of monthly panels have engaged the industry in thought-provoking discussions about innovation vis-à-vis commercial enterprise, a marketing deal has been struck with Semico, and the whole friggin’ organization has been re-branded as the ESD Alliance to reflect an intent to get more IP guys, more Embedded guys, and more Yet-to-be-identified guys into the alliance than just the traditional anchor tenants from EDA.

But none of this comes close to the potential impact of the latest disruptive idea that ESDA is proposing: The founding of a brand new working group that could very well redefine the whole semiconductor supply chain: The ESD Alliance System Scaling Working Group.

Astonishing.

Read the rest of Please Crispify: The ESD Alliance System Scaling Working Group

DownStream: Solutions for Post Processing PCB Designs
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