IP Showcase
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

Uniquify & Samsung: Success and mystery abound

 
April 30th, 2015 by Peggy Aycinena

 

It’s the kind of announcement that regularly emanates from IP companies: “Uniquify today announced it developed a DDR3 IP solution for Samsung Electronics’ power-efficient 28nm LPP foundry process that is now in volume production for multiple product lines, including consumer and mobile applications.”

The thing is, there are two bigger take-aways from this announcement than the specifics of the news. One is that news about 28 nanometers is still making news. The way marketing bravado in the industry runs, one would think 10 nanometers is upon us completely.

The other thing is that we’re not talking here about Samsung planning to adopt Uniquify’s DDR3; we’re talking about Samsung using these things in volume production. A very different kettle of fish, and something that IP companies often have so much trouble getting their customers to acknowledge. [Same holds true, of course, for EDA vendors as well.]

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OK, Google: A Man and His Watch

 
April 23rd, 2015 by Peggy Aycinena

 

I’ve got a friend who received an Android Wear (read “watch”) as a gift earlier this year. In the last several months, he’s become addicted to wearing the darn thing although its usefulness is distinctly limited: He can check the time and screen calls without digging a phone out of his pocket. Oh yeah, and when messages and/or emails come in, he knows straightaway.

Other than being a fascinating toy, however, and something to diddle with – particularly for those who like the openness of Android – Wear is really not much more than a distinctive fashion statement and not too much of that.

Nonetheless, now that Apple’s claiming more stupendous success with yet another highly over-hyped product launch (read, “the Apple Watch”), it’s time to re-consider the importance, even gravitas, of this Android Wear thing. After all, let’s not just lay down in the road and let Apple run over us yet again. Let’s cheer on these Android Wear users. Let’s celebrate anybody willing to stand up to the Apple juggernaut. Yay!

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IP @ DAC: Design reuse still not for faint of heart

 
April 16th, 2015 by Peggy Aycinena

 

Building on last year’s success, the 2015 Design Automation Conference in San Francisco is offering even more substantial content in the track centered on silicon IP and design reuse. Reading through the list of topics, speakers, and companies set to be featured across a diverse set of sessions from June 7-9 at Moscone Center, two things are obvious.

One, a lot of work has been done to assemble all of this. And two, it’s possible the thorny issues surrounding IP reuse may never go away: integration, verifying quality, convincing staff to use design blocks that originate outside of the group, and dealing with the massive amounts of data that IP selection and reuse generates.

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DesignWare EV IP: Convolutional Neural Networks at Core of Capabilities

 
April 1st, 2015 by Peggy Aycinena

 

Early Monday morning, Synopsys announced several new bits have been added to their impressive bucket of IP blocks, a new family of DesignWare processors targeted at vision applications. With an honorable pedigree – descent from the ARC technology that came to Synopsys via the 2010 acquisition of Virage Logic – the processors announced on March 30th are designed to be embedded in SoCs, specifically to meet a growing need to digitally “distinguish smiles from frowns, faces from cars, baby carriages from trees or dogs, and even sky from ground.”

These needs were articulated in a March 26th phone call with Synopsys Senior Manager of Product Marketing Mike Thompson, who enthusiastically explained, “The vision market will grow dramatically over the next several years. The next 10-to-15 years will be seen as a paradigm-shift period in how we interact with technology.”

That’s why he’s delighted Synopsys will surpass other players in driving that shift: “There are already a few vision processors available [on the market], and they are largely programmable. We took a slightly different approach, however, with the new DesignWare EV Processors we’ve developed.

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DVCon/SNUG: The Old, Old Story of Design by Committee

 
March 24th, 2015 by Peggy Aycinena

 

We’re only gifted with so many hours of life here on earth, so why would anyone waste them listening to the same lengthy keynote twice in one month? That was the thought that raced through my mind when Synopsys’ Aart de Geus stepped up onto the stage in front of 500+ SNUG attendees at the Santa Clara Convention Center yesterday morning and clicked on his title foil.

“Shift Left,” it said.

“Oh no,” I said. For pity’s sake, this was the exact same talk co-CEO de Geus offered up less than three weeks ago on March 3rd at DVCon in San Jose. I looked around for the nearest exit.

Then, cooler heads prevailed. Mine.

Wait a minute, I said. Three weeks ago I sat in the back of a ballroom at the DoubleTree, listening over the heads of 350 people at DVCon, and typed everything the good doctor said into my tablet, verbatim. I’ve already done the heavy lifting here, I thought. I’ve got his script on my tablet, I’ve seen the slides, and I’ve heard the jokes.

Does Synopsys believe an entirely different audience attends DVCon than that which attends SNUG? Why else would they present the exact same talk at the two venues? Perhaps no one at SNUG actually does verification? Why not compare the SNUG talk to the one at DVCon?

So, with that much entertainment guaranteed I sat back and enjoyed the show.

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Performance, Security, Behavior: how Silicon Cloud’s driving the IoT

 
February 26th, 2015 by Peggy Aycinena

 

In a recent phone call, Silicon Cloud co-founder and CEO, Mojy Chian asserted that the IoT has inspired a new set of initiatives from his lively startup enterprise.

“If you look at the Internet of Things in its entirety, it includes the transmission, aggregation, processing, cloud services and so on.” Chain said, “But it all starts with the nodes, the endpoints, which are the sensors.

“Today we are positioning Silicon Cloud to provide a design-enablement infrastructure for the IoT, a large part of which is the chip design. But now we are extending our services to include design tools for sensors, concentrating on the node itself, and providing a complete infrastructure for node design enablement. We don’t design the semiconductor or the sensor, of course. We provide the design enablement for others to use to design these things.”

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DVCon: IP now part of the calculus

 
January 28th, 2015 by Peggy Aycinena

 

DVCon is coming up in early March in San Jose and if you’re into IP, you should be there. That was the surprising take-away I stumbled upon this week while interviewing DVCon General Chair Yatin Trivedi and Technical Program Chair Ambar Sarkar. As many of you know, Yatin is Director of Standards and Interoperability Programs at Synopsys and Ambar is Chief Verification Technologist at Paradigm Works, both men throwing long shadows in the deeply technical world of design and verification.

Our interview was taped on the sound stage in the glam new Synopsys building on Middlefield in Mountain View. Yatin works in the just-opened building, but Ambar flew in from his offices in Andover, Massachusetts, for our chat and was lucky enough to get out of Boston before Juno blew in and shut down all flights out of New England.

The three of us sat on director chairs on Monday morning and chatted on film for well over 30 minutes. Pretty darn fun, but also pretty darn informative. Who knew that Yatin and Ambar were so interested in IP, and we’re not just talking here about Verification IP. When I mentioned I’d seen that IP was one of the topic areas set to be showcased at the upcoming DVCon in March, Yatin launched into an enthusiastic endorsement of all things IP.

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eSilicon: Kick the IP before you buy

 
January 15th, 2015 by Peggy Aycinena

 

In any marketplace, it’s the buyer’s problem to know in advance of a purchase whether the product is worth the money. In the IP marketplace, the problem’s particularly intense, because until the block is operating within the target environment, it’s close to impossible to know if it’s worth the money.

Today eSilicon is offering what appears to be a reasonable solution to the dilemma. Per the company, “now you can get immediate answers to your power, performance or area questions with pre-loaded data for eSilicon memory compilers and I/Os using the eSilicon IP Marketplace environment.”

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Security: The future is dark?

 
January 8th, 2015 by Peggy Aycinena

 

In October, IPextreme hosted a day-long meeting in San Jose to “Unlock the Mysteries of IP”. The morning started off with an hour-long panel discussion that touched at times on security. Not the security having to do with elusive and dangerous elements in this treacherous world, but that related to the more banal dangers of insurance companies.

In the emerging era of an IoT a’glitter with wearable gadgets for tracking our blood pressure, heartbeat, temperature, calorie consumption, steps per day, hours sleeping, and brain waves – those trendy connected devices pursued and celebrated by technologists on panels everywhere – three problems have emerged.

First, where in heck is all of this data going to be stored? Second, how is it going to be processed and determined to be normal or not? And finally, how can we be guaranteed that all of this data, particularly the abnormal stuff, will not be presented to our insurance companies, or other bureaucracies, without our permissions?

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New Year’s Resolution: Solve 10 Mysteries of IP

 
January 1st, 2015 by Peggy Aycinena

 

The New Year is upon us and it’s time for resolutions. Here’s an interesting one: Find the answers to 10 simple questions related to the business and technology of IP. The questions may be simple, but the answers probably are not, if they are available at all.

**************

* How many IP vendors are needed on average today to provide blocks for a typical chip?

* How does one learn how to buy and integrate IP into a design?

* What is a fair price for a block of IP?

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