IP Showcase

Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

Performance, Security, Behavior: how Silicon Cloud’s driving the IoT

 
February 26th, 2015 by Peggy Aycinena

 

In a recent phone call, Silicon Cloud co-founder and CEO, Mojy Chian asserted that the IoT has inspired a new set of initiatives from his lively startup enterprise.

“If you look at the Internet of Things in its entirety, it includes the transmission, aggregation, processing, cloud services and so on.” Chain said, “But it all starts with the nodes, the endpoints, which are the sensors.

“Today we are positioning Silicon Cloud to provide a design-enablement infrastructure for the IoT, a large part of which is the chip design. But now we are extending our services to include design tools for sensors, concentrating on the node itself, and providing a complete infrastructure for node design enablement. We don’t design the semiconductor or the sensor, of course. We provide the design enablement for others to use to design these things.”

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DVCon: IP now part of the calculus

 
January 28th, 2015 by Peggy Aycinena

 

DVCon is coming up in early March in San Jose and if you’re into IP, you should be there. That was the surprising take-away I stumbled upon this week while interviewing DVCon General Chair Yatin Trivedi and Technical Program Chair Ambar Sarkar. As many of you know, Yatin is Director of Standards and Interoperability Programs at Synopsys and Ambar is Chief Verification Technologist at Paradigm Works, both men throwing long shadows in the deeply technical world of design and verification.

Our interview was taped on the sound stage in the glam new Synopsys building on Middlefield in Mountain View. Yatin works in the just-opened building, but Ambar flew in from his offices in Andover, Massachusetts, for our chat and was lucky enough to get out of Boston before Juno blew in and shut down all flights out of New England.

The three of us sat on director chairs on Monday morning and chatted on film for well over 30 minutes. Pretty darn fun, but also pretty darn informative. Who knew that Yatin and Ambar were so interested in IP, and we’re not just talking here about Verification IP. When I mentioned I’d seen that IP was one of the topic areas set to be showcased at the upcoming DVCon in March, Yatin launched into an enthusiastic endorsement of all things IP.

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eSilicon: Kick the IP before you buy

 
January 15th, 2015 by Peggy Aycinena

 

In any marketplace, it’s the buyer’s problem to know in advance of a purchase whether the product is worth the money. In the IP marketplace, the problem’s particularly intense, because until the block is operating within the target environment, it’s close to impossible to know if it’s worth the money.

Today eSilicon is offering what appears to be a reasonable solution to the dilemma. Per the company, “now you can get immediate answers to your power, performance or area questions with pre-loaded data for eSilicon memory compilers and I/Os using the eSilicon IP Marketplace environment.”

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Security: The future is dark?

 
January 8th, 2015 by Peggy Aycinena

 

In October, IPextreme hosted a day-long meeting in San Jose to “Unlock the Mysteries of IP”. The morning started off with an hour-long panel discussion that touched at times on security. Not the security having to do with elusive and dangerous elements in this treacherous world, but that related to the more banal dangers of insurance companies.

In the emerging era of an IoT a’glitter with wearable gadgets for tracking our blood pressure, heartbeat, temperature, calorie consumption, steps per day, hours sleeping, and brain waves – those trendy connected devices pursued and celebrated by technologists on panels everywhere – three problems have emerged.

First, where in heck is all of this data going to be stored? Second, how is it going to be processed and determined to be normal or not? And finally, how can we be guaranteed that all of this data, particularly the abnormal stuff, will not be presented to our insurance companies, or other bureaucracies, without our permissions?

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New Year’s Resolution: Solve 10 Mysteries of IP

 
January 1st, 2015 by Peggy Aycinena

 

The New Year is upon us and it’s time for resolutions. Here’s an interesting one: Find the answers to 10 simple questions related to the business and technology of IP. The questions may be simple, but the answers probably are not, if they are available at all.

**************

* How many IP vendors are needed on average today to provide blocks for a typical chip?

* How does one learn how to buy and integrate IP into a design?

* What is a fair price for a block of IP?

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IP Ecosystem: DAC wants You!

 
December 10th, 2014 by Peggy Aycinena

 

The powers-that-be at DAC want to hear from you if you’re involved in the IP industry in any way: IP providers, IP tool vendorsIP methodology experts, and IP users of all kinds.

They want all of you and the good news is, it doesn’t matter in which technical niche you play: low-power IP, IP implementation, IP subsystems and integration, verification IP, or IP strategies and management.

Also, because the last few years at DAC have provided powerful proof-of-concept validation that the Design Automation Conference community really wants to talk about IP, the IP Track is clearly now a critical plank in the infrastructure of the conference.

But don’t believe me; believe the DAC Executive Committee: “The IP Track provides an opportunity for experts in the field to deliver presentations and/or poster  sessions on IP-related topics, and to host panels and invited talks on timely IP related issues.”

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Sonics’ Randy Smith: Why Integrity makes IP tick

 
November 20th, 2014 by Peggy Aycinena

 

Randy Smith bring a lot of humanity to his role as Vice President of Marketing at Sonics, and a lot of frequent flier miles. The day after we spoke by phone last week, he was set to fly to Japan for a week on business. When I asked if Japan was a new destination for him, he laughed.

“I’ve been to Japan over 150 times,” he said, “and because of that, I have lifelong business relationships there, having worked closely with customers, EDA vendors, design services and IP providers. That’s why my business card used to say ‘Randysan Marketing’. I always look forward to going to Japan, because it gives me the opportunity to touch bases with customers there and to [reconnect] with colleagues.”

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Kaufman Dinner: Philosophy redefined

 
November 6th, 2014 by Peggy Aycinena

 

It was impossible not to be in a celebratory mood if you attended the exuberant Kaufman Award dinner at the San Jose Marriott on Tuesday, November 4th, honoring this year’s nominee, Dr. Lucio Lanza. Next door to the Kaufman ballroom, where at least 250 well-dressed pillars of the EDA industry were eating, drinking, and reconnecting with old friends, was another ballroom where hundreds and hundreds more were celebrating early election results for one of the two mayoral candidates for San Jose, elections having been held that day. Combining the energies emanating from the two ballrooms, the whole hotel was really rocking.

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USB 3.1: Synopsys still King of the Hill

 
October 30th, 2014 by Peggy Aycinena

 

This week Synopsys added even more fire-power to the arsenal that makes them one of the biggest IP vendors in the world. This time it’s USB 3.1, which the company says consists of a …

“DesignWare USB 3.1 Device Controller, an IP Virtual Development Kit and verification IP to accelerate the development of high-performance storage, digital office and mobile SoC applications. [The new product] supports 10 Gbps data transfer rates, power-down capabilities and compatibility with existing USB 3.0 software stacks and device protocols. Based on the DesignWare USB 3.0 Controller IP architecture, which has shipped in more than 100 million SoCs, the DesignWare USB 3.1 Device Controller IP enables designers to integrate USB 3.1 functionality with significantly less risk and faster time-to-market.”

As always, Synopsys delivers in a big way, which is why interviewing their people is always so much fun. These guys enjoy their work and know they’re on top, and not necessarily in that order. My phone call around the USB 3.1 announcement was with Eric Huang, Senior Product Marketing Manager for USB Digital IP at Synopsys, and was lively from start to finish.

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IoT: the A-to-Z of TechTalk at ARM TechCon

 
October 2nd, 2014 by Peggy Aycinena

 

This blog requires a long, tall cup of coffee: Go get one, put your feet up, and plow on through. ARM TechCon 2014 took place this week at the Santa Clara Convention Center, and as an indication of what the industry feels is important right now, the following is a complex snapshot of press releases issued by various TechCon exhibitors highlighting their progress in the days leading up to and including the show. Listed first are the three main ARM press releases, then the other exhibitors are showcased.

By the way, the answer to what the industry thinks is important today? If the following is any indication, it’s IoT all the way down, with a dollop of FinFET and low-power thrown in for good measure. And if you don’t know IoT means Internet of Things, you haven’t been listening – particularly as Freescale says in their Press Release: “Analyst research firm Gartner estimates that the IoT will include 26 billion units installed by 2020, and by that time, IoT product and service suppliers will generate incremental revenue exceeding $300 billion, mostly in services.”

Another possible conclusion from the following: If you’re still holding out hope the Design Automation Conference is anchor tenant of the conference year, you should let that go. The amount of news these companies are releasing around ARM TechCon far out weighs what they’re releasing around DAC.

** ARM announced on October 1st “two new physical IP implementation solutions for its silicon partners to help simplify the path to implementation for their FinFET physical designs. ARM Artisan Power Grid Architect will reduce overall design time by creating optimal SoC power grid layouts, while ARM Artisan Signoff Architect increases accuracy and precision in managing on-chip variation over existing methodologies. These new physical IP implementation solutions strengthen the commitment from ARM to enable delivery of real silicon with the speed consumers are demanding.”

** ARM announced on October 1st, mbed OS, a free operating system for ARM Cortex-M processor based devices that consolidates the fundamental building blocks of the IoT in one integrated set of software components; mbed Device Server, a licensable software product that provides the required server-side technologies to connect and manage devices in a secure way, that also provides a bridge between the protocols designed for use on IoT devices and the APIs that are used by web developers; and mbed.org, the focus point for a community of more than 70,000 developers around mbed. The website provides a comprehensive database of hardware development kits, a repository for reusable software components, reference applications, documentation and web-based development tools.

** ARM and TSMC announced on October 2nd a new multi-year agreement that will deliver up ARMv8-A processor IP optimized for TSMC 10FinFET process technology. Per the Press Release: “Because of the success in scaling from 20SoC to 16FinFET, ARM and TSMC have decided to collaborate again for 10FinFET. This early path-finding work will provide valuable learning to enable physical design IP and methodologies in support of customers to tape-out 10FinFET designs as early as Q4 2015.”

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