Open side-bar Menu
 Guest Blogger
Anand Shirahatti
Anand Shirahatti
Anand Shirahatti is the CTO of Arrow Devices. He has been instrumental in making the company a leading provider of Verification, Validation and Debug Solutions. He has over 15 years of experience in design and verification. Most recently, he was a Senior Design Engineer at Nvidia. Arrow Devices … More »

Developing USB 3.1 IP? Essential Updates To USB 3.0 You Need To Know

November 4th, 2014 by Anand Shirahatti


USB-3-1-vs-USB-3-Technical-ComparisonInitially, USB provided two speeds (12 Mbps and 1.5 Mbps). With rapid adoption and success of the USB standard and the increasing power of PCs and computing devices, the USB 2.0 specification was defined in the year 2000. USB 2.0 provided upto 480 Mbps of bandwidth while keeping software compatibility with earlier USB applications. With ever increasing bandwidth requirements, in 2008 the USB 3.0 specification (providing 5 Gbps bi-directional bandwidth) was released. USB 3.1 is the next logical step in this progression. It provides 10Gbps of bi-directional bandwidth while maintaining backward compatibility with previous USB versions. To know more about USB 3.1 Verification solution click here.

In this post, we will analyze the technical differences between the USB 3.1 and USB 3.0 specifications. The aim is to enable people familiar with USB 3.0 to quickly understand the main aspects of USB 3.1.

 We will analyze the PHY, Link and Protocol layers and list out the major ways in which USB 3.1 differs from USB 3.0.

PHY Layer

The USB 3.1 specification refers the USB 3.0 PHY as Gen1 PHY and the USB 3.1 PHY as the Gen2 PHY.

1. Gen2 PHY uses a protocol over LFPS signaling to negotiate to highest common data rate of two connected PHYs

2. Encoding: Gen2 PHY uses 128b132b encoding while Gen1 PHY uses 8b10b encoding. This new encoding has lesser overhead and hence is more bandwidth efficient

3. Gen1 Link needs to transmit D/K codes while Gen2 Link needs to transmit Data and Block-Header

4. Gen1 Scrambler: G(X) = X16 + X5 + X4 + X3 + 1

    Gen2 Scrambler: G(X) = X23 + X21 + X16 + X8 + X5 + X2 + 1

5. Gen2 introduces some new symbols (Table 6-1). Usage is summarized in the link layer section:

  • DPHP
  • SDS

6. Gen2 Link Initialization & Training has an additional step: “Block alignment”

7. Gen2 SKP Ordered Set is different from Gen1. SKPEND allows receiver to identify location of next block header

8. PingLFPS for SuperSpeedPlus has new max value of tBurst

9. SuperSpeedPlus Capability Declaration is done while in Polling.LFPS state using SCD1 and SCD2 patterns

10. SuperSpeedPlus allows Binary Representation of Polling LFPS: logical 0 and 1 can be transmitted to receiver by varying the LFPS’s tRepeat

11. SCD1 and SCD2 are transmitted using Binary Representation of Polling.LFPS

12. SuperSpeedPlus allows LBPM: An LFPS based PWM messaging mechanism:

  • Logic ‘0’: tPWM = 1/3 tLFPS + 2/3 Elect.Idle
  • Logic ‘1’: tPWM = 2/3 tLFPS + 1/3 Elect.Idle

Link Layer

1. Differences in DPH:  For SuperSpeedPlus USB, all header packets except for non-deferred DPH are the same as SuperSpeed USB. The non-deferred SuperSpeedPlus DPH is a header packet with its own framing ordered set, and contains a length field replica immediately after the Link Control word. The purpose of this special construction is to allow the non-deferred SuperSpeedPlus DPH to be processed differently from all other header packets and to achieve single bit error tolerance in its length field.

2. Header packet framing is different for deferred and non-deferred DPHs in SuperSpeedPlus. In SuperSpeed, they are same.



4. While SuperSpeed operation allows premature termination of a DPP with DPPABORT Ordered Set, SuperSpeedPlus does not allow this. DPP boundary has to be preserved (Except if Warm Reset or Recovery occurs during DPP).

5. Changes in Link Commands for SuperSpeedPlus: LCRD link command is extended in SuperSpeedPlus:

  • Bit 2 is “Credit Series” in SuperSpeedPlus, this bit is Reserved in SuperSpeed
  • New “Credit Series” are LCRD1_x and LCRD2_x

6. SuperSpeedPlus defines Type1 and Type2 traffic classes. SuperSpeed has only one traffic class.

7. Type1 traffic class consists of the following packets:

  • DPs
  • TPs
  • ITPs
  • LMPs

Type2 traffic class consists of asynchronous DPs

8. SuperSpeedPlus Defines the Idle Symbol Ordered Set differently from SuperSpeed

9. Link Initialization for SuperSpeedPlus additionally requires Type2 Rx Buffer Credit Advertisement

10. SuperSpeedPlus additionally requires Link to maintain Type2 Rx Buffer Credit Count (both Local and Remote)

11. SuperSpeedPlus Link needs to maintain two CREDIT_HP_TIMERs (one for each of Type1 and Type2)

12. SuperSpeedPlus link needs to implement “Link Error Count” (Section Except for UPstream ports in SuperSpeed operation, all ports SHALL implement Link Error Count

13. SuperSpeedPlus may optionally implement “Soft Error Count

14. For SuperSpeedPlus operation, port shall transition to Polling.PortMatch upon detecting Training Sequence Error in Polling.Active or Polling.Configuration

15. Major LTSSM changes in SuperSpeedPlus: New Polling States

  • Polling.LFPSPlus (SuperSpeedPlus operation performs SCD2 handshake for confirming SuperSpeedPlus capability of link partner)
  • Polling.PortMatch (SuperSpeedPlus link partners perform LBPM handshake, announcing, matching and deciding highest common capability)
  • Polling.PortConfig (Port configures PHY according to matched capabilities)

Protocol Layer

1. Precision Time Measurement is a new capability introduced in SuperSpeedPlus:

  • PTM enables USB devices to have more precise notion of time by providing a method of precisely characterizing link delays, and the propagation delays through a hub. The PTM capability is discovered by software through the PTM Capability Descriptor described in Section
  • PTM support is optional normative for all peripheral devices and SuperSpeed only hosts and hubs
  • Link Delay Measurement (LDM) LMP: Added new LMP for Precision Time Measurement

 2. ACK TP changes in SuperSpeedPlus: Some new fields have been added:

  • Transfer Type (TT). When operating at Gen 1 speed, the value of this field is Reserved and shall be set to zero. When not operating at Gen 1 speed, this field is defined in spec section 8.5.1
  • TP Follows (TPF). When operating at Gen 1 speed, this field is reserved. When not operating at Gen 1 speed, this bit shall be set only if the device intends to send a Device Notification TP following this TP (Spec section 8.5.1)
  • There are additional extra fields such as SSI, WPA, DBI and NBI (table 8-13)

 3. A new Device notification TP type SUBLINK_SPEED, has been added.

  • Spec section
  • This specification includes features to support SSIC capabilities, such as asymmetric link speeds and multiple lanes. The Enhanced SuperSpeed bus does not support Asymmetric link speeds or multiple lanes. An Enhanced SuperSpeed device shall only set the Subink Type to Symmetric and shall set the Lane Count field to zero.

 4. DP changes in SuperSpeedPlus: Some new fields have been added:

  • Transfer Type (TT). When operating at Gen 1 speed, the value of this field is Reserved and shall be set to zero. When not operating at Gen 1 speed, this field is defined in spec section 8.5.1
  • Route String/Arbitration Weight/Reserved field: Not for device, Device will set this to 0.

 5. ITP changes: A new field has been added:

  • Correction: This field specifies the negative delay in tIsochTimestampGranularity units that the ITP has accumulated passing through PTM capable hubs. This field shall be set to 0 by the host (Spec section 8.7)

 6. SuperSpeedPlus Supports IN transfers with multiple IN endpoints simultaneously (Spec section 8.10.2)

 7. SuperSpeedPlus Transaction Reordering

  • On a SuperSpeedPlus bus instance, TPs shall be transmitted before DPs (for both periodic and asynchronous packets), if there are TPs and DPs ready for transmission.
  • SuperSpeedPlus hubs and devices shall select periodic data packets before asynchronous data packets for transmission on the link.
  • TPs use Type 1 Link Credits.
  • Periodic DPs use Type 1 Link Credits. Asynchronous DPs use Type 2 Link Credits

 8. Some timers have been defined for IN transfers:

  • tGen2MaxBurstInterval: for the time between DPs being bursted from a device endpoint to the host or from the host to a device endpoint
  • tGen2MaxDeviceMultiPacketInterval : for the time between DPs being concurrently bursted from different device endpoints to the host

9. Invalid TP: one more condition has been added the checks performed to determine a valid TP

  • If TT does not match the endpoint type (Bulk, Isoc, Interrupt, Ctrl. Spec section 8.11.1)

10. ISOC endpoints can send more ISOC data transfers per service interval:

  • The host shall be able to accept and send up to 48 DPs per service interval for devices operating at Gen 1 speed and up to 96 DPs for devices operating at Gen 2 speed

We hope you find the above useful to get a quick technical introduction to USB 3.1!

More Updates: (Thanks to Jan Axelson of Lakeview Research)

A-1. USB 3.1 has more detailed requirements for receptacle back-shields (5.8.2) and for the standard-A receptacle, new requirements for ground tabs and grounding spring tabs. (

A-2. USB 3.1 removes USB 3.0’s specified color for each wire. (5.4.2)

A-3. And some new descriptors defined in USB 3.1:

  • SuperSpeedPlus USB Device Capability – required for SuperSpeedPlus devices
  • Precision Time Measurement Device Capability – required for all hubs and all devices that support PTM
  • SuperSpeedPlus Isochronous Endpoint Companion descriptor – required for isochronous endpoints that operate above Gen 1 speed and request more than 48KB per service interval

Related posts:

Tags: , ,

Leave a Reply

Your email address will not be published. Required fields are marked *


You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>

S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy