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EDAC’s CEO Forecast Panel

Thursday, March 8th, 2012

This DAC blog is from March 2, 2012 by Paul McLellan


This year’s CEO forecast panel was held at Silicon Valley Bank. Bankers live better than verification engineers, as if you didn’t know, based on the quality of the wine they were serving!

This year the panellists were Ed Cheng from Gradient, Lip-Bu, Aart and Wally (and if you don’t know who they are you haven’t been paying attention) and Simon Segars of ARM (not their CEO, of course). Ed Sperling moderated. Somebody had managed to dig up the fact that at the start of his career he’d been a crime reporter, so that made sure that we only got truthful answers all evening!

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Addressing the Design Power Gap and ANSYS / Apache Product Roadmap and Integration

Monday, March 5th, 2012

At DesignCon 2012, I had the pleasure of speaking with Vic Kulkarni, Senior Vice President & General Manager of Apache,  about the issues surrounding the Power Gap in product design.  I also spoke separately with Larry Williams from ANSYS and Aveek Sarkar from Apache Design, Inc. which was acquired by ANSYS in Aug. 2011.

The acquisition of Apache complements ANSYS’ software solutions by bringing together best-in-class products that drive ANSYS’ system vision for integrated circuits, electronic packages and printed circuit boards. The complementary combination is expected to accelerate development and delivery of new and innovative products to the marketplace while lowering design and engineering costs for customers.

To understand the issues around the Design Power Gap and how Power Artist from Apache can help  listen to the interview below.


Video and Tech Paper: Simulating Large Systems with Thousands of Serial Links

Wednesday, February 29th, 2012

I spoke with Todd Westerhoff of SiSoft about their new Virtual Prototype Analysis that can  simulate large systems with thousands of serial links at DesignCon 2012.  You can see the video interview here and below is a short description and link to a technical paper that described the analysis of such a large system.

While not long ago systems had only several serial links, it’s now becoming common for systems to include hundreds – and even thousands – of such links. This paper describes the development and analysis of a large system with thousands of serial links. Due to the system’s size and complexity, the design team invested in a multi-year effort to build and qualify a virtual environment capable of both verifying connectivity and simulating any and all of the channels. Problematic channels with incomplete system-level connections, poor eye openings, or high BER are quickly identified. Performance limiters such as inherent discontinuities (and their associated resonances), and Tx/Rx equalization imbalance are found and examined in detail. The virtual system is also used to guide design choices such as layer stacking, via construction, back-drilling, and trace/connector impedances. Processes to optimize and select equalization choices are also described.

Click here to read Simulating Large Systems with Thousands of Serial Links.

Click here for more information on Virtual Prototype Analysis.

Reinventing the EDACafe Weekly

Thursday, February 23rd, 2012

Welcome to the new “EDACafe Weekly.”   Every Monday you will be receiving a summary of the previous weeks EDACafe blog postings, including our featured writer Peggy Aycinena.   There will be postings from my blogs: Video Roundup, The Dominion of Design and IP Showcase, that cover the various facets of creating new electronic designs.  And of course, all the other blog contributors from the past week.

We look forward to hearing your comments about the new format….and let me know if you would like to start a blog on EDACafe.


Panel on HW/SW Co-design from the Software Perspective, Mon. Feb. 27

Tuesday, February 21st, 2012
EDA companies often address hardware/software co-design from a hardware point of view. ie, how can software developers run their software on this representation of a chip that was designed on our tools. This viewpoint often overlooks the real concerns of software developers. Today, since software is the fastest growing and the largest engineering content of a SoC/ASIC design, it is time for the EDA industry to understand the needs and concerns of the software industry. This panel attempts to address these needs and concerns. 

The panel is organized by Paul McLellan, an EDA industry: guru, veteran, analyst and author. He has extensive experience in IC design, software development and system virtualization . In particular he was VP marketing at VaST (since acquired by Synopsys) and Virtutech (since acquired by Wind River/Intel). The panelists include software engineering managers who are responsible for SoC/ASIC software development at major corporations. After the panelists discuss their issues there is a 30 minutes audience questions and answers session.

• Paul McLellan, EDA Industry Analyst and Author, EDA Graffiti
• EDAC Emerging Companies Committee
• Michael James, Senior Staff Engineer, Lockheed-Martin Space Systems Company
• Atul Kwatra, Principal Engineer, Intel corporation
• Bill Neifert, Chief Technology Officer, Carbon Design Systems
• Don Williams, Head of Core Technology, Skype
Date: Monday, February 27, 2012
Time: 6:30 PM to 9:00 PM.
Location: DoubleTree Hotel, 2050 Gateway Place, San Jose, CA 95110 (Co-located with DVCon) 


Register Now

Upcoming EDA Consortium Annual CEO Forecast and Industry Vision, Feb. 29 …And See What They Said in 2011

Friday, February 17th, 2012


Click Here to see what the CEO and Executives said in 2011.  Were they right?

DesignCon 2012 Video Interviews and Photo Gallery

Friday, February 10th, 2012

I was doing video interviews at DesignCon 2012 in Santa Clara last week.   The event was busy with lots of attendees and presentations.  You can enjoy over 20 interviews covering all the advancements in high-frequency IC, board and system design at the following page:

DesignCon 2012 Video Interviews

I also took the time to walk the show floor and take photos of various booths and attendees at the event.  You can enjoy the gallery below.

Happy Valentines Day!


The Best of 2011 – EDA Weekly Magazine, Press Postings, and Careers Corner

Friday, January 6th, 2012

As 2012 begins, it is time to review the stories and weekly articles that were picked by you, the audience, as the most interesting and newsworthy.   We have grouped them by the highest number of click-throughs or readers.

The EDA Weekly Magazine covered many different technology and business topics.  The top Magazine article of 2011 was an analysis of SpringSoft, written by Russ Henke.

Author Title Date Click-throughs
1 Russ Henke  

Welcome SpringSoft!

May 2 3,061

Russ Henke

Back to the Future July 25 2,823

Russ Henke

A Tektronix Gain
May 30 2,238
4 Graham Bell  

The Best of 2010 – EDA Weekly Magazine, Press Postings, and Careers Corner

Jan. 4 2,184

Russ Henke

Real Intent – Part II
Feb. 7 2,167


EDACafe has also been tracking Press Coverage throughout the year.  The leading articles were a mix of customer wins, acquisition announcements and business reports, with Tanner EDA topping the list.  Here are the most newsworthy corporate stories for 2011:

Title Date Click-throughs

Tanner EDA Lands Experienced EDA Account Manager for Growing Customer Base

June 21 2,139

Cadence Acquires Azuro

July 12 1,302

Synopsys to Acquire Magma Design Automation

Nov. 30 1,295

Icahn Issues Open Letter to Shareholders of Mentor Graphics

April 21 1,277

ANSYS, Inc. Signs Definitive Agreement to Acquire Apache Design Solutions

June 30 1,259

Freescale Licenses Synopsys’ DesignWare IP Portfolio to Accelerate SoC Designs

Mar. 23 1,230

ICCAD 2011 Call for Papers: Deadline: Monday, April 18

Mar. 14 1,033

Mentor Graphics Issues Open Letter to Shareholders

April 25 899

Design & Reuse Announces 20th Anniversary Program for IP-SOC; December 7-8, 2011, World Trade Center, Grenoble, France

Nov. 15 899

48th Design Automation Conference: Double Digit Increase in Attendance

June 9 882


In the IC News category the following were the top 5 stories:

Title Date Click-throughs
1 Texas Instruments introduces industry’s smallest wireless power receiver chip April 18 965
2 Atego launches Aonix Perc Ultra 6 May 3 730
3 National Semiconductor Adds Three High Output Voltage Products to SIMPLE
SWITCHER Power Module Family
Jan. 19 614
4 STMicroelectronics Unveils Next-Generation iNEMO Engine March 24 613
5 New SerDes from Analog Bits Reduces Footprint, Power & Cost: Saves up to 700 milliwatts on Flat Panel Display SOCs March 18 609


Careers Cafe authored by Mark Gilbert was also a regular feature.  The following article published on Feb. 17, 2011, received an amazing 6,647 click-throughs:

So what has changed in EDA hiring?… Is my wild prediction coming true?… How might Mentor play …

The staff of Internet Business Systems and thank you for your readership and wish you a prosperous 2012!

24th EDA Interoperability Forum – Interview and Photos

Thursday, December 1st, 2011

Synopsys hosted the 24th EDA Interoperability Foum on Nov. 30 and I had the pleasure to attend the event.   We listed to keynote speakers who highlighted what has changed in the last decade and what are the next challenges to be taken on.  I interviewed Rich Goldman VP, Corporate Marketing and Strategic Alliances, who gave his  summary of the event and the highlights from the keynote speakers. You can listen to it here.

I also took some photos which you can see below.

Yatin Trivedi also spoke with Rich for a recap of the event.  You can see the video here:


New Careers Corner: Is the year end really the best time to look??? …and More

Wednesday, November 23rd, 2011

Don’t miss Mark Gilberts’ latest column for Careers Corner and More.  You will enjoy reading Mark’s thoughts on moving your career forward even as we near this time of the rolling year.  You can see his thoughts and recommendations here.

Happy Thanksgiving!


TrueCircuits: IoTPLL

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