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 The Dominion of Design

Archive for June, 2011

PCI-SIG: Agilent EEsof and SiSoft Video Interviews and Exhibit Photos

Thursday, June 23rd, 2011

I was at PCI-SIG in Santa Clara this week, discovering all things PCI.    Currently PCIe 3.0 runs at 8 Gbits per second, which means lots of difficulties getting signals to arrive at their destination without experiencing losses and have eye-closures and inter-symbol interference.    There is talk about at upcoming PCIe 4.0 running at 16 Gbits per second.  Now that is FAST!

I took photos of the exhibit area and also interviewed Agileen-EEsof and SiSoft technologists about their offerings.

You can click to see the videos here:



Here is the photo gallery of the exhibit area.

Caption this Photo – Win a Starbucks Gift Card!

Thursday, June 9th, 2011


I was at the Denali Party  by Cadence this week in San Diego during the 2011 Design Automation Conference.   I got this photo of   Ziggy Minnelli posing with a martini.  I need a caption to go with the photo.  Please use the Comments link below to submit your entry.   The winner will receive a Starbucks Gift Card and will be announced on June 21, 2011.

Good Luck!


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Great Connections for Better Design

Monday, June 6th, 2011

I am struck at how easy it is to get used to “good enough” ways of working.  Often we fail to notice new innovations that can make our tasks easier and boost our productivity and reduce risk to success.  When asked about connecting to other design team members locally and worldwide, engineers might think of a VPN link to their office computer or the headquarters email server.  However, they would be missing the exciting developments of a whole new way of working that brings collaborative resources to bear on the design process, so that design creation, verification and integration is easier and less costly to do.

Geographically diverse design teams obviously face a number of challenges in the creation and verification of the IPs that form a functioning system-on-chip (SOC).  Design teams often grow organically and have local versions of design tools, with the related licensing and operating systems to support these tools, and means to check-in and out those designs with other teams.  Design datasets require version control of their source files, and verification sign-off steps must occur at each stage of the design process.  Questions naturally arise whether design IP has been verified using the correct application and technology libraries?

Centralized location of design files is one way to improve design management, and if the CAD licenses can be run remotely as well, then this can further benefit a structured design process and eliminate the management of CAD licenses and applications locally. Some design teams have adopted remote execution of their CAD tools from a central server, but may be forced to use expensive high-bandwidth connections to support graphical intensive applications such as IC layout or suffer with low-bandwidth connections that affect display quality.

Ideally, collaboration on a design would include shared computer desktops so graphical layouts can be reviewed and updated from diverse locations. And the connectivity solution would reduce the need for expensive high-bandwidth connections.

Connectivity solutions such as Exceed onDemand from OpenText make centralized CAD environments easy to achieve.  Their high-speed thin client graphical interface to a central location is especially architected to reduce the amount of network bandwidth to display graphical content.   Even graphically intensive 3D CAD and real-time rubber banding during layout editing is now feasible for multiple team members connected to a central location.

To simplify design control and validation as it proceeds from conception to final GDSII layout, centralized hardware and software can deliver a more stable, predictable and cost-effective design process.  Verification of IC designs takes a considerable amount of compute resources and server farms stacked with multi-CPU machines are often used to attack these problems, especially as the design proceeds closer to final tape-out.

It makes good sense to centralize these resources and gives teams robust access to them.   The freedom to launch lengthy verification runs, suspend the session from an office computer and then re-connect with that session later to monitor simulation progress, or make adjustments, allows the designers to flexibility to work from multiple locations and time zones.  Disruptions in local power or network connections do not affect the success of verification runs on a robust secure central location.

Security is also an issue with design creation and collaboration.  Centralized location of design files means synchronization of local design files is minimized and encrypted communications ensure that corporate intellectual property is preserved.  Secure and managed communications with IP suppliers and third-parties means data access can controlled as needed.

Exceed onDemand from OpenText provides the capabilities needed by SOC design teams worldwide and has been adopted by leading companies in the semiconductor industry.  Cadence Design System in EDA, Renesas in semiconductor manufacturing, and Skyworks Solutions, a fabless supplier of wireless chips have all adopted and used Exceed onDemand to made design tasks easier, boost productivity and protect the security of their design IP.  Good enough can be great with the right tool to bring our world of design together.

TrueCircuits: IoTPLL

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