Hardware-assisted verification platforms have been proven to support the verification needs of modern SoC realization. These platforms offer multi-MHz performance and comprehensive hardware debugging capabilities, which enable pre-silicon hardware/software co-verification and software validation.
However, each ASIC/SoC application also has its own unique challenges and requirements, and supporting their needs requires more than just fast emulation and 100% design accessibility. SoC realization also requires a high-performance, system-level verification platform surrounding the emulated design, including many application-specific peripherals and interfaces.
In this recurring blog series, we will explore specific SoC applications, assessing the design challenges and benefits of hardware-assisted verification, and examining the protocols and IP required to support SoC development.