Ralph Zak is business development director at EVE. Zak’s experience with hardware-based verification tools covers both emulation and prototyping systems. He began with simulation accelerators in the 1980s. Zak was the first vice president of marketing at Quickturn, now part of Cadence, and also … More »
SoC Verification Made Easy
July 10th, 2012 by Ralph Zak
Yes, you read the headline correctly and there are no typos in it. For 10 years or more, companies such as EVE have focused their engineering resources on providing high-performance, application-specific validation solutions with the goal to simplify the process of verifying complex SoC designs.
Yes, again –– A tall order, but not impossible, even as the International Technology Roadmap for Semiconductors (ITRS) reports that the number of processors and the amount of software will double with each semiconductor technology node. This increasing level of SoC complexity demands more feature-rich solutions for hardware and software verification to keep project schedules and resources within reasonable bounds.
And verification providers should comply. The goal, then, is for hardware-assisted verification companies to provide an ecosystem of application-specific, system-level validation tools around their SoC emulation systems that cover the broad spectrum of functions built into complex SoC designs. The key is to build each platform in a way that simplifies the effort of the project design and verification team to setup, run and then debug complex designs. The platforms must also leverage all of the advanced debug facilities in the emulation system.
EVE’s perspective on how this can be accomplished is based on hundreds of projects that employed accelerated transaction-level verification. The key to successful projects is providing a broad range of mature application-specific validation platforms that assure emulation speed is maintained in the multiple MHz range.
These platforms include testbench development tools and APIs for easy integration with the DUT, along with protocol-specific synthesizable transactors to convert transaction-level testbenches into signal-level components within dedicated emulation hardware. Tools for real-time capturing of all the transaction-level bus activity and all the frame/packet level data for debug are must haves, as is easy access to and graphical representations of the captured data.
A validation platform should maintain full-compatibility with all the simulation-like debug features of the emulator, especially high-level, post-run debug to capture data and restart the emulation at any point to deterministically trace all problems. A critical consideration is links to real-world environments, such as live networks and real USB devices with virtual adapters to the test environment, where appropriate, without the need for speed matching equipment. The platform needs to provide accessibility across WAN and LAN environments to provide distributed project teams a common platform for integration and test of different modules, the entire SoC RTL code and all the embedded software.
While this seems like a tall order, solutions are available today and provide a range of these types of capabilities. For example, as a result of 10 years of development effort, EVE offers solutions for more than 50 multimedia functions, standard bus and communication protocols, ESL and embedded software tools integration and storage environments.
No one can proclaim that SoC verification challenges have been fully solved, but we’re closer than ever with viable solutions. Look no further than SoC emulation systems with complete validation solutions on one platform.
Yes, indeed. SoC verification made easier!