Open side-bar Menu
 ForEVEr

Archive for December 15th, 2011

Coming Full Circle

Thursday, December 15th, 2011

We have a running joke in the EVE office in San Jose, Calif., that our children will keep us employed. The truth is, we’re not far off. Our kids are the driving force behind the development of new technology. They are using social media and downloading videos as forms of communication, networking and entertainment, and it’s a constant barrage on an already overworked Internet.

Bandwidth is becoming an increasing problem. Sluggish downloads or error messages due to capacity and overload are not going to cut it for the younger set who wants it now and in high-definition video. While the baby boomers fashioned instant gratification into a lifestyle, this generation has made it into a high-speed, multitasking art form.

If complaints about a slow-crawling Internet sound familiar, they should. The EDA industry enabled the telecommunications infrastructure overhaul from 1998 to 2000 with powerful, effective hardware and software tools, just as the Internet was becoming a new form of communication.

And here we are again, poised for another huge leap in Internet and cellular bandwidth requirements, supplied by telecom equipment makers and the semiconductor/EDA ecosystem supporting them. Our children are ensuring gainful employment for those of us in these industries as they lead the way for all of us to overload the networks in 2012 and 2013.

We’re already seeing the signs in the form of new communication chip design projects. Be it fabless semiconductor players or network equipment suppliers directly, processing and multimedia requirements are moving up 4-6X in the next design cycle.

The EDA community has the opportunity once again to play a big role in revamping the backbone of the Internet infrastructure because suppliers will need more powerful EDA tools to develop next-generation devices. Each piece of the design flow will play a role, but the significant opportunity will be available to those of us that address co-development of hardware and software for these new platforms.

Development teams assigned to a SoC project of this magnitude will be juggling embedded multicore processors, DSP, third-party IP in hardware and huge development teams for software applications, now required across multiple operating systems. A strategic verification plan will be a must-have for the project team and emulation should be its keystone.

Emulation is uniquely suited to these challenges due to its versatility. It provides a close realization to silicon because it models a design into a hardware implementation, the only a way to ensure that all of the blocks are verified accurately and in a reasonable timeframe. Emulation can test a wide range of design styles, and validate hardware and software on billion-gate devices by exercising billions of clock cycles before tapeout. Emulators include hardware debugging capabilities and execute RTL models at multi-MHz speeds, mitigating runtime performance issues associated with simulation, particularly at the full-chip and system level. Newer emulators are more cost effective than traditional models, making them more accessible than ever before.

I consider this phenomenon as a means of coming full circle, both in business and in life, thanks to our children. 2012 should be an exciting year for the EDA industry as a whole — and verification vendors in particular — as we facilitate another overhaul of the Internet. I hope our children will be pleased. And in the meantime, I need help with one of the features on this new PDA.

 

TrueCircuits: IoTPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise