This week at EDSFair in Japan, EVE is demonstrating the latest addition to its ZeBu family of fast emulation systems, ZeBu-Blade2. This next generation emulator couldn’t have arrived at a better time, as the verification community searches for innovative solutions for the challenges of System-on-chip (SoC) realization, where emulation now plays a key role.
Emulation technology has been around for three decades, but only recently has it gained mainstream acceptance as an integral part of SoC realization. This acceptance is due primarily to the growth in SoC design sizes and, to a greater extent, in embedded software that combined are thrusting the required verification cycles for full-chip validation into the trillions. Ten years ago, the average ASIC design size was around one-million ASIC gates, and full-chip hardware verification could be performed with an HDL simulator.
Sure, every verification manager wants deeper verification coverage and faster execution speeds. But given the high cost of emulation (more on this later), only the largest companies with the most complex designs — typically large-scale CPU or graphics devices that pushed the boundaries of simulation performance — deemed it necessary to leverage an emulator for more verification cycles.
Today, the average SoC design is more like 20- or 30-million ASIC gates. As a result, companies of every size and in every market segment have a significantly larger state space to traverse for hardware verification.
But it’s not just the hardware that needs to be verified anymore. The explosion of embedded software content in modern SoC designs requires billions, if not trillions cycles — as affirmed by an executive of a popular embedded processor company — in pre-tapeout software validation and hardware/software co-verification. Combine this with shrinking market windows, and emulators have now become a mandatory tool for SoC realization, leveraged by hardware and software developers alike.
If emulation is now required for every developer, where is the emulator for the people? The people’s emulator must be easy to use, provide high performance, and be light on the wallet. Traditional emulation systems — often based on custom processors—are known for their ease of use, but are also known for their high costs. These systems are physically monstrous that may require infrastructure changes in a lab for power, cooling, space, and even floor reinforcement.
Alternatively, FPGA-based prototyping offers high performance at low costs, but lacks the ease of use and hardware debugging features of emulation. Thus, many organizations have been forced to choose between full featured but costly emulation, and low cost but difficult-to-use FPGA prototyping.
The arrival of commercial FPGA-based emulators has caused a paradigm shift in emulation. When standard FPGA devices such as the Xilinx Virtex-6 LX760 are leveraged as the core emulation technology, the development cycle for an emulator is significantly reduced — a cost savings passed directly to the customer. These high-speed, high-density and low-power devices also enable multi-MHz full-chip emulation in a desktop chassis using standard power outlets — no lab reconstruction required. A robust software layer ensures that FPGA-based emulation provides ease-of-use features such as automated compilation and full-chip RTL waveform generation.
The emulator for the people is here, and its name is ZeBu-Blade2.