Bridging the Frontier
Bob Smith, Executive Director
Bob Smith is Executive Director of the Electronic System Design Alliance, formerly the EDA Consortium. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem. … More »
March 23: An Evening on Energy Efficiency from the ESD Alliance and Sonics
March 7th, 2017 by Bob Smith, Executive Director
Fresh from our “Ride with the Verify Seven” evening co-hosted with ESD Alliance member company OneSpin during DVCon, we’re planning our next event with another member company –– Sonics –– Thursday, March 23.
The panel, “Energy Policy and Strategy for the IoT Era,” moderated by Grant Pierce, Sonics’ CEO and chairman of the Alliance board of directors, will outline new energy rules for PCs set by the California Energy Commission (CEC). A panel discussion will look at how these new rules affect the system design ecosystem and how the industry will adapt to them.
The standards, primed to begin January 1, 2018 and roll out through July 2021, cover desktop computers, notebooks and laptops, small-scale servers, workstations and monitors, the top consumers of electricity in California. Estimates are staggering –– the state reports consumption of about 5,610 gigawatt hours of electricity or 3% of residential electricity use and 7% commercial. The CEC determined something needed to change, even though many manufacturers build seemingly energy-efficient products. The new standards are estimated to save 2,332 gigawatt hours per year and reduce utility bills by more than $370 million, enough energy to power about 350,000 California homes a year while reducing greenhouse gas emissions.
Please join us to learn more from a great line-up of panelists. For example, Dave Ashuckian, CEC’s deputy director of the Efficiency Division, and Pierre Delforge, director, High Tech Sector Energy Efficiency of the Natural Resources Defense Council (NRDC), will explain the new rules and regulations. They will describe how the standards came about and why they are necessary, how much energy they will save, when they will take effect and how they will be enforced.
Five other panelists will address what they mean for the system design ecosystem, including EDA, IP, embedded software and other technology vendors that supply products to PC system manufacturers. They will look at the implications for broader national and global energy efficiency standards for electronic products, particularly as they relate to the emerging IoT market. Those panelists include:
As each provide their perspectives on opportunities for providers of goods and services in the system design ecosystem, attendees will learn about potential new technical innovations in design and manufacturing. They will get insights into what impact the rules will have on their companies’ as well as the semiconductor industry’s energy policies and strategies.
The panel will take place Thursday, March 23, beginning at 6 p.m. with networking, light snacks and drinks, at the San Jose City Hall Rotunda, a landmark building that serves as San Jose’s hub of civic and cultural activity. It is located at 200 East Santa Clara Street in San Jose, Calif.
Shireen Santosham, San Jose’s chief innovation officer, will offer opening remarks.
The panel is open free of charge to all ESD Alliance member companies. Non-members are welcome to attend for a fee of $40. More details and registration information can be found at: http://bit.ly/2mdHKpH
If we have enough interest, the Alliance may establish an Energy Policy and Strategy initiative and forge cross-industry alliances with like-minded industry organizations. To learn more or to become a member of the ESD Alliance, please contact me at email@example.com or visit our website at: www.esd-alliance.org
Missed one of the ESD Alliance’s events? Our Past Events page has photos and, in some cases, recordings of most of our events that go back as far as 1999. The page can be found at: http://bit.ly/2lxjQ9r