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 Bridging the Frontier

Archive for January, 2017

A Photo Montage of a RISC-V Evening to Remember

Tuesday, January 31st, 2017

Rainy winter weather didn’t deter anyone from the Open Source and the RISC-V processor panel Wednesday, January 18, hosted by the ESD Alliance at the Cadence facility in San Jose, Calif. Well, almost everyone. Rick O’Connor, executive director of the RISC-V Foundation, didn’t make it because a snowstorm closed the airport in Ottawa, Canada. Instead, he dialed in from there and gave the audience an overview of the RISC-V Foundation and was available to answer questions. Ted Speers, a member of the RISC-V Foundation board and head of Product Architecture and Planning for Microsemi’s SoC Group, amiably stepped in as his replacement.

The moderator was Jim Hogan of Vista Ventures, our long-time partner who works with Steve Pollock of AI-Pac on the regularly scheduled series like this one presented by our Emerging Companies Committee. Yunsup Lee, SiFive’s chief technology officer (CTO) and co-designer the RISC-V ISA and the first RISC-V microprocessors, offered a fascinating look at the open sources processor movement.

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S2C: FPGA Base prototyping- Download white paper



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