Open side-bar Menu
 Bridging the Frontier
Bob Smith, Executive Director
Bob Smith, Executive Director
Bob Smith is Executive Director of the Electronic System Design Alliance, formerly the EDA Consortium. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem. … More »

Now’s a Great Time to Join the ESD Alliance!

 
August 7th, 2017 by Bob Smith, Executive Director

Now is a great time to join the ESD Alliance. In fact, the timing hasn’t been better. Membership increased by 20% over last year’s numbers. We’re in the midst of planning our fall schedule that will include a few popular events, such as the Phil Kaufman Award ceremony and dinner, always a crowd pleaser and terrific networking opportunity. By joining now, you and your employees can attend many of our fall networking events at no additional cost.

The ESD Alliance isn’t only about networking and educational events. In fact, we have quite a few largely unheralded programs that our members consider of great value. We break them into five additional categories –– market information, risk management, growth and efficiency, emerging companies and industry voice.

For example, the Market Statistics Service (MSS) is a mainstay among them and is part of the market information category. Quarterly revenue data is collected from contributing companies and aggregated by an outside accounting firm to ensure no individual company data is disclosed. Members receive a quarterly report with excellent, up-to-date information and trends for determining total available market and so much more. The driver of this 20-year program is Wally Rhines from Mentor, a Siemens Business, which should give you a hint to its importance and relevance.

In more ways than I can count, the Export Committee is an effective and invaluable resource to member companies for risk management and avoidance. It represents all of them with a unified voice in Washington, D.C., on export licensing and compliance issues. I recently blogged about the help it gave to two new members Helic (http://bit.ly/2vesFGT) and SoC Solutions, now Silvaco (http://bit.ly/2fmvcuJ).

Read the rest of Now’s a Great Time to Join the ESD Alliance!

The ESD Alliance Goes to DAC

 
July 18th, 2017 by Bob Smith, Executive Director

Approximately 5,000 members of the electronic system design ecosystem were in full force in Austin, Texas, last month for the annual Design Automation Conference. The ESD Alliance as both a sponsor and exhibitor was there, of course, and Julie Rogers, Paul Cohen and I attempted to get to every booth and every presentation while Paul’s granddaughter Rachael staffed our booth. We had a chance to meet many new faces and catch up with long-time friends and associates. Our informal survey told us that exhibitors were pleased with the turnout in Austin, many of whom said they had loads of good conversations about tools and methodologies.

Michael (Mac) McNamara, DAC’s General chair, and the DAC Executive Committee should be commended for the keynote speakers who left every member of the audience enthused, inspired and jazzed. What could be better?

What indeed? The Pavilion on the DAC exhibit floor was a popular attraction. Of special note was the Sky Talk moderated by Ed Sperling of Semiconductor Engineering and featuring ARM’s CEO Simon Segars and Lucio Lanza, managing director of Lanza techVentures, both of whom are Alliance Board Members. Kudos to Simon for being awake and alert at 3 a.m. in Japan to participate remotely. All’s forgiven for he had good reason to be teleconferenced into DAC instead of being there in person –– he was named that week to the SoftBank board of directors and attended his first board meeting.

Ed also moderated informative Sky Talk sessions with other ESD Alliance board members Lip-Bu Tan from Cadence, Wally Rhines of Mentor, a Siemens Business, and Synopsys’ Aart de Gues.
Read the rest of The ESD Alliance Goes to DAC

EDDR Software Joins ESD Alliance; MSS Report Shows Growth, Export Committee’s Expertise

 
July 6th, 2017 by Bob Smith, Executive Director

It’s been a busy few weeks since DAC and full of good news from the ESD Alliance. First, we welcomed our newest member EDDR Software, developer of custom and open source enterprise solutions for semiconductor design. According to Kevin Nesmith, EDDR Software’s CEO, “The ESD Alliance has the potential to open opportunities for us to partner with other member companies to create better solutions for users. We look forward to participating in working groups to help set the direction of the semiconductor design ecosystem.” The news release with more information is available at: http://bit.ly/2uvpTfo 

More good news as our latest Market Statistics Service (MSS) report shows the EDA industry revenue increased 10.5 percent for Q1 2017 to $2167.5 million, compared to $1962 million in Q1 2016. “The EDA industry reported double-digit growth in Q1, led by gains in the two largest categories, CAE and Semiconductor IP,” reports Wally Rhines, board sponsor for the MSS and president and CEO of Mentor, a Siemens business. “The two largest regions, Americas and Asia-Pacific, also reported double-digit growth in Q1.” For more details, see the news release at: http://bit.ly/2suTCUk

Read the rest of EDDR Software Joins ESD Alliance; MSS Report Shows Growth, Export Committee’s Expertise

Encryption Guidelines Modified through ESD Alliance’s Export Committee Efforts

 
June 22nd, 2017 by Bob Smith, Executive Director

Congratulations to SoC Solutions and Silvaco! SoC Solutions will soon be under the Silvaco umbrella. (See the news release, “Silvaco to Acquire SoC Solutions.”

As a member of the ESD Alliance, SoC Solutions recently took full advantage of the well-honed expertise of our Export Committee. In fact, as SoC Solutions found, anyone who doubts the value of the ESD Alliance or its Export Committee won’t after learning that the three-person group took on the U.S. Department of Commerce’s Bureau of Industry and Security (BIS) and won.

Yes, consider the Export Committee formidable. Made up of representatives from Synopsys, Mentor and Cadence, it was able to persuade BIS to change a small but important piece of the Encryption and Export Administration Regulations. “In our EDA world, we have one main exemption that my committee gained for the industry back in 2005 –– decontrolling our usage of encryption in the design cycle,” says Cadence’s Larry Disenhof, the chair of the Export Committee. Only in the last year has the main body of encryption regulations caught up with our exemption fully decontrolling ancillary encryption used in products from DVD players and household appliances to protection of IP in electronic design, he added. “Without this exemption, we would have been filing license applications constantly for the last 10 years.”

That insight well served SoC Solutions of Suwanee, Ga., supplier of IP and services to build innovative “connected” products and a new member of the Alliance. While networking events and the SIP Working Group were CEO Jim Bruister’s reasons for joining, his perspective changed once Disenhof answered his questions about cryptography export.

Specifically, Jim wondered about the guidelines related to exporting advanced encryption standard (AES) cores to foreign countries. And as he did with Helic, Larry was able to help. He sent a link to the BIS website chock full of information on Encryption and Export Administration Regulations. The encryption category has a wide range of carve-outs, exceptions and licensing or reporting requirements that can be opaque, cautioned Disenhof. He further advised SoC Solutions to study the regulations carefully and perhaps consult with an export attorney.

Jim was impressed with Larry’s practical advice. “Larry pointed me to the Category 5 part 2 that speaks to encryption as part of a design. Because our project schedule is quite tight, we decided not to put our AES core in the design. The main reason is due to having to file a license to have AES in a chip that can be exported. When we get to that point, we will get an export lawyer to review and file.”

The outcome for SoC Solutions may have been different without the ESD Alliance. “This guidance is quite valuable to a small company such as ours. We don’t have lawyers on staff so it helps us evaluate before contacting a lawyer. It saves us money.”

Access to the Export Committee’s expertise is one of the many benefits offered to members of the ESD Alliance. If your company would like to join the ESD Alliance, please visit the ESD Alliance website to read about our committees and ongoing initiatives. I’m always available to answer questions and can be reached at bob@esd-alliance.org.

In my next blog post, I’ll write about Helic’s positive experience with the Export Committee. And after that, a report on this year’s DAC.

ESD Alliance Celebrates Summer Solstice at GSA Silicon Summit, DAC

 
June 8th, 2017 by Bob Smith, Executive Director

The following week, we’re off with rest of the semiconductor design ecosystem to Austin, Texas, for the Design Automation Conference (DAC). Events kick-off Sunday, June 18, and go through Thursday, June 22, with exhibits running Monday through Wednesday from10 a.m. until 6 p.m. at the Austin Convention Center.

The opening event, “Electronic Design Automation (EDA) in the Age of the System,” will update attendees on the state of EDA. Chief Analyst Laurie Balch of Gary Smith EDA will present the firm’s findings at this ESD Alliance-hosted event Sunday from 5 p.m. until 5:30 p.m. in Ballroom D of the convention center. A DAC reception immediately follows on the Fourth Floor Foyer. 

We’re pleased that so many of our board members will have visible roles in the DAC program, starting with Amit Gupta, president and CEO from Solido, who will moderate a panel titled, “EDA Powered by Machine Learning,” It will be held Monday in Room 10AB from 10:30 a.m. until 11:30 a.m

A “One-On-One” discussion with Lip-Bu Tan, president and CEO of Cadence, and Ed Sperling, editor-in-chief of Semiconductor Engineering, will be held Monday from 11:30 a.m. until 12:15 p.m. at the DAC Pavilion. Lip-Bu will share insights about big changes in the data center and end markets, the rise of machine learning, growing challenges in system design, and what to watch for in China.

Read the rest of ESD Alliance Celebrates Summer Solstice at GSA Silicon Summit, DAC

ESD Alliance’s New Look; See us at DAC

 
May 25th, 2017 by Bob Smith, Executive Director

The ESD Alliance has a new look with a refreshed website, thanks to our tenacious Member of the Technical Staff Paul Cohen who oversaw the entire project.

And, what a project it was! The design streamlines our activities, all found in neatly packaged pull-down sections running across the top right of the home page. You’ll find information about us, including the staff, board of directors, committees and member companies. Our active initiatives provide the forum for member companies to address issues of common concern and fall broadly into five categories –– risk management, growth and efficiency, industry voice, events and education, and market information. All are outlined in detail and we invite participation from member companies. Naturally, we have a section on news and events that hosts our newsletters and my blog. More content is being added regularly. Please let Paul (paul@esd-alliance.org) or me (bob@esd-alliance.org) know what you think.

Of course, the next event is the Design Automation Conference (DAC), the premier conference for design and automation of electronic systems, long sponsored by the ESD Alliance. DAC is being held this year at the Austin Convention Center in Austin, Texas.We’ll be in booth #2123 Monday-Wednesday, June 19-21, from 10 a.m. until 6 p.m.

Please stop by our booth to see us. We’ll have our latest newsletter and other handouts. And, make sure you visit our member companies’ DAC booths as well. By all means, tell them I sent you!

Read the rest of ESD Alliance’s New Look; See us at DAC

Twenty Years of the ESD Alliance’s Market Statistics Service

 
May 9th, 2017 by Bob Smith, Executive Director

One of the most popular and enduring programs the ESD Alliance offers its members is the quarterly Market Statistics Service (MSS) report containing detailed revenue data for the EDA, Semiconductor IP and design services industries. The report compiles data submitted confidentially by public and private EDA and semiconductor IP companies into tables and charts listing the data by product category and geographic region.

The chart above shows the MSS Revenue by category from 1996 through 2016.


Read the rest of Twenty Years of the ESD Alliance’s Market Statistics Service

Welcome CAST and SoC Solutions, New Members of the ESD Alliance

 
April 25th, 2017 by Bob Smith, Executive Director

Please join me in welcoming two new members of the ESD Alliance –– CAST and SoC Solutions –– both of whom are semiconductor IP providers and intend to become active members of our SIP Working Group.

CAST of Woodcliff Lake, N.J., has 23 years of SIP experience and offers a range of production-proven SIP cores that include controllers and processors, compression, peripherals, interconnect and security, and encryption.

SoC Solutions from Suwanee, Ga., enables next-generation IoT and Machine to Machine (M2M) silicon devices by supplying processor-based IP and services to build innovative, low-power “connected” products.

According to Jim Bruister, SoC Solutions’ CEO: “The ESD Alliance is the all-important connection to the semiconductor design ecosystem. For a company like ours, there’s no better organization to belong to for both the networking opportunities and the Semiconductor IP Working Group that’s helping to define so many critical aspects of our market segment.”
Read the rest of Welcome CAST and SoC Solutions, New Members of the ESD Alliance

A Picture is Worth a Thousand Words –– Photos from the CEO Outlook!

 
April 20th, 2017 by Bob Smith, Executive Director

The semiconductor design ecosystem came out in force Thursday, April 6, for the CEO Outlook at Synopsys in Mountain View, Calif. It was a great crowd and an exceptional panel moderated by Semiconductor Engineering’s Ed Sperling. Thanks to Lip-Bu Tan of Cadence, Wally Rhines from Mentor, ARM’s Simon Segars and Aart de Geus at Synopsys for their insights and a lively discussion.

Our special guests that night were from the Dwight D. Eisenhower School for National Security and Resource Strategy, part of the National Defense University (NDU). The ESD Alliance hosts a yearly visit from the NDU students and organizes meetings with noted semiconductor companies in Silicon Valley to help educate them about our industry and its importance to the global electronics industry.

A picture is worth a thousand words, so I’ll dispense with a long blog and let the photos tell the story.

If you’re craving words to describe the evening, Peggy Aycinena wrote a blog filled with color and loads of details on EDACafe. It can be found at: http://bit.ly/2kjVajD

From left to right: ESD Alliance Board Chair Grant Pierce of Sonics, the ESD Alliance’s Julie Rogers, Wally Rhines, Aart de Geus, Paul Cohen of the ESD Alliance and Larry Disenhof of Cadence.

Ed Sperling of Semiconductor Engineering (at left) with panel members and ESD Alliance Board Member (from left to right) Lip-Bu Tan of Cadence, Wally Rhines from Mentor Graphics, ARM’s Simon Segars and Aart de Geus of Synopsys.


Read the rest of A Picture is Worth a Thousand Words –– Photos from the CEO Outlook!

Next Week’s CEO Outlook to Gaze at the Future, Bask in Industry’s Vitality

 
March 28th, 2017 by Bob Smith, Executive Director

The spectacular news this week from the ESD Alliance’s Market Statistics Service (MSS) that revenue increased 18.9 percent for Q4 2016 will be an exclamation point to next week’s CEO Outlook.

For example, revenue for Q4 in all four geographic regions –– Americas, Europe, Middle East and Africa, and Japan and Asia/Pacific –– increased 18.9 percent for Q4 2016 to $2455 million, compared to $2064.5 million in Q4 2015. All product categories saw fourth-quarter growth. In fact, CAE, Semiconductor IP, IC Physical Design & Verification and PCB/MCM reported double-digit increases. Another positive sign is employment is up 6.6% overall.

CEO Outlook attendees can expect to hear much more about industry opportunities for growth and challenges as Ed Sperling, editor-in-chief of Semiconductor Engineering, moderates the panel of four of our most visible CEOs and Alliance Board Members. They are: Aart de Geus, CEO at Synopsys, Lip-Bu Tan, president and CEO of Cadence, ARM’s CEO Simon Segars and Wally Rhines, chairman and CEO of Mentor Graphics and board sponsor for the MSS.
Read the rest of Next Week’s CEO Outlook to Gaze at the Future, Bask in Industry’s Vitality

S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy