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Posts Tagged ‘3D ICs’

Predictions 2014: Sumit DasGupta on ensuring a vibrant semiconductor industry

Wednesday, February 26th, 2014

Retired senior vice president of Si2, Sumit DasGupta, imparts his sage view on what the semiconductor, EDA and IP industries should focus on to ensure a vibrant semiconductor industry for 2014. 

“As the new year rolls out, there are promises and associated challenges that the semiconductor industry faces that need attention to ensure the vibrancy of the industry, even as the industry struggles to stay on the Moore’s law trajectory.

First in my list is the area of 2.5D and 3D integration, an area of great promise but with significant challenges. Much has been touted about these approaches as ways to deliver “More than Moore” but it appears to this observer to be advancing at a pace that is slower than hoped for. It seems to be just another year away from full production. But now, enough said, 2014 needs to be the year when much greater focus must be applied to get at least 2.5D technology into mass production. This is not a transitory approach to 3D but rather should last longer in its own right as a very viable technology sitting alongside 3D as 2 approaches to semiconductor integration. 3D still has challenges to be addressed but here again, greater focus needs to be applied to ramp up to full production in 2015.

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Predictions 2014: Mike Demler on the ecosystem triad

Monday, February 17th, 2014

Next up in our series of predictions is the astute insight of Mike Demler, Senior Analyst with The Linley Group & MICROPROCESSOR report, and former EDA & Chip Design news analyst.  

“It’s all about the ecosystem triad: EDA + foundry + IP.  Cadence and Synopsys continue to evolve more in the IP direction, and there is really not much to say about the tools that hasn’t been said for a long time —just make it all work together!  Redundant “standards” and artificial barriers to interoperability cost the semiconductor industry by lowering productivity.  This is the problem with the disaggregated model. Back in the days when “real men” had fabs, companies could develop complete design flows without such obstacles.

The triad needs to work together to get over the stall inMoore’s Law at 28nm.  Foundries are incurring delays in getting to 16/14nm FinFETS, and almost nobody is going to use 20nm. The chip industry needs an overall lower-cost solution in order to make sub-28nm processes economically viable.  Forget 3D ICs, those will be niche products for a long time, about as popular as 3D TV.

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Predictions 2013

Monday, January 14th, 2013

 

The world did not come to an end in 2012, so we can now breathe a sigh of relief and prognosticate about 2013. Or can we? Well, we can but what sort of world will it be for the EDA and IP industries in 2013? Should we even go there?

We think so. So we asked industry friends, associates, clients and media folks to ponder what industry-shattering events or breakthroughs we might see in EDA & IP this coming year.

We’ll be posting predictions from these industry visionaries over the next couple of weeks. We hope that you will find them as enlightening and entertaining as we did.

We’ll begin with some eye-opening predictions by blogger, author and industry expert, Paul McLellan.

2013 is all about lithography, EUV, the end of Moore’s law, 3D as a savior etc. Specifically:

• There will be a lot of discussion about the costs of 20nm since it is so much more than 28nm. It will be a very slow transition with some people going straight to 14/16nm (which is really 20nm with smaller transistors which is really 26nm with smaller transistors). Expect lots of discussion about the end of Moore’s law.

• EUV lithography will not become commercial during 2013 and so will miss the 10nm node.

• TSV-based 3D ICs will start to become mainstream. Memory on logic, and mixed digital/analog on interposer. Expect lots of discussion about “more than Moore” and how 3D is the new way for scaling.

• The death of a giant will finally take place. Nokia, still #1 only a year ago, will be dismembered. A consortium of Apple, Google and Samsung will buy the patents for billions. Huawei will buy the handset and base-station businesses for peanuts.

• Synopsys will acquire Mentor. EDA will otherwise be fairly boring with the big three being the only companies able to attack the upcoming problems that require dozens of tools to be updated, not just a new point tool inserted in the flow.

• If the IPO markets are open, Jasper, eSilicon, Atrenta and Tensilica will go public. If someone doesn’t buy them first.

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