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Archive for August 20th, 2013

How to avoid timing exception pitfalls

Tuesday, August 20th, 2013

We often think that we’ve got the timing job nailed down and that there aren’t any problems that we can’t easily, almost routinely solve.  Using timing exceptions to optimize synthesis or P&R shouldn’t be a problem.

However, making an error when specifying timing exceptions can possibly shut down a design project.

Take a look at what Atrenta’s Shaker Sarwary, Ramesh Dewangan and Sridhar Gangadharan say about how to avoid this situation:

http://alturl.com/99bbs

(Note:  white paper download requires registration)

LeePR does work for Atrenta.

 




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