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Ed Lee
Ed Lee
Ed Lee has been around EDA since before it was called EDA. He cut his teeth doing Public Relations with Valid, Cadence, Mentor, ECAD, VLSI, AMI and a host of others. And he has introduced more than three dozen EDA startups, ranging from the first commercial IP company to the latest statistical … More »

Qualcomm, imec and Atrenta talk about how to handle 3D

 
June 28th, 2010 by Ed Lee

I attended Qualcomm, imec and Atrenta’s presentation to bloggers on 3D this afternoon and it was enlightening to hear about what this up and coming design approach could give a company like Qualcomm.

 

Qualcomm’s Riko Radojcic clearly was the point person on the joint effort. After all, he was the customer specifying what his intriguing PathFinding vision and technology had to be and become….and he’s been working on this for QUITE a while. Radojcic noted that while the promise of 3D is high and sets expectations about a new level of design, the reality is that the technology to achieve 3D design is broken. That’s how he embarked on the definition and realization of Qualcomm’s PathFinding vision and technology. He heads up the Qualcomm PathFinding technology effort.

 

Atrenta, imec and AutoESL collaborated to create what Qualcomm thinks is the first working 3D flow. While it’s incomplete – only HLS and early estimation tools are included right now – Radojcic said it has started him on realizing the PathFinder vision. He said that he certainly needs HLS and early estimation tools and that gets him started. He needs early estimation to find the sweet spot for a chip’s architecture and the technology for those leading edge designs Qualcomm designs. BUT this first version of the flow will need more tools and a lot of support by the time the 3D design demand hits in 2012.

 

The presenters kicked off the event by defining what 3D is. They agreed that with 3D design, you mix and match into one vertical step. Easy, right? Well, not quite. All of them recognized that the complexities of 3D require that you get it all right up front. And that is harder than anyone thinks.

 

The presenters agreed that a lot of work needs to be done to realize Radojcic’s PathFinding vision, of which 3D is a big part. But the tool vendor partners also saw it as an opportunity for them and the EDA vendors as well.

 

– Liz Massingill

 

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2 Responses to “Qualcomm, imec and Atrenta talk about how to handle 3D”

  1. EDA watcher says:

    There’s a good 3D design flow graphic here at Dan Nenni’s blog:

    http://danielnenni.com/2010/06/27/semiconductor-design-in-3d/#comments

  2. 3D is showing up everywhere! http://bit.ly/9Y6Qlg & talk on 3D PathFinding was given by Riko Radojcic & summarized @ http://bit.ly/9XUiSM

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