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Archive for April, 2015

Extended System Coherency Part 3: Increasing Performance and Introducing CoreLink CCI-500

Monday, April 13th, 2015


System coherency remains an important factor for SoC design starts. The ARM® CoreLink™ CCI-400 has seen great success, over 35 licensees across multiple applications from mobile big.LITTLE, to network infrastructure, digital TV and automotive infotainment. In all these applications there is a need for full coherency for multiple processor clusters, and IO coherency for accelerators and interfaces such as networking and PCIe.


Compared to CoreLink CCI-400, the recently-announced CoreLink CCI-500 offers up to double the peak system bandwidth, a 30 percent processor memory performance increase, reduced system power, and high scalability and configurability to suit the needs of diverse applications. This blog will go into more detail on these benefits, but first I’ll give a quick recap of cache coherency and shared data.


Extended System Coherency 2 – Implementation, big.LITTLE, GPU Compute, Enterprise

Tuesday, April 7th, 2015



This is the second part of a series of blogs about hardware coherency. In the first blog I introduced the fundamentals of cache coherency: Extended System Coherency – Part 1 – Cache Coherency Fundamentals

This part talks about the implementation of hardware cache coherency and use cases.


Implementing Hardware Coherency


ARM’s first implementations of AMBA® 4 ACE include the ARM® CoreLink™ CCI-400 Cache Coherent Interconnect, ARM Cortex®-A15 and Cortex-A7 processors. These products were first released to our silicon partners in 2011, and we’ve seen the first big.LITTLE™ products come to market in 2013.


S2C: FPGA Base prototyping- Download white paper

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