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Archive for June 1st, 2009

Hello EDACafe!

Monday, June 1st, 2009

It is with great pleasure that today I’ve a featured blog on EDACafe. My name is Chitlesh Goorah. I will be exposing different opensource solutions which will interest both EDA engineers and ASIC designers.

Some of you may know me from my work behind Fedora Electronic Lab. For about three years now, we are proposing an opensource ASIC design and simulation platform, which is fairly well accepted by many universities around the world. We are working closely with many upstream projects such as gEDA, veripool, open circuit design, … in order to ensure interoperability between our solutions.

At the same time, Fedora developers are introducing Windows cross-compilers for the next version. Thereby, EDA vendors can also use Fedora or entreprise-class distribution such as RHEL or CentOS as a development ground for their products.

Later, I will introduce other features such as virtualisation, mass deployment, various design handoff checking facilities, … etc each accompanying with at least an example. Many designers and CAD engineers are already using opensource tools such as Vi, Emacs, svn, … I am looking forward to read your comments on my next posts.

ClioSoft at DAC
TrueCircuits: IoTPLL

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