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Archive for June, 2009

Using Fedora’s Windows cross compilers to extend EDA software distribution

Sunday, June 14th, 2009

Last week announced the availability of Fedora 11. This new release entails Windows cross-compilers
introduced by Fedora’s MinGW Special Interest Group.

The aim is to eliminate duplication of work for application developers by providing a range of libraries and development tools which have already been ported to the cross-compiler environment. This means that developers will not need to recompile the application stack themselves, but can concentrate just on the changes needed to their own application.

Though this feature will interest a wide range of software developers, I believe EDA vendors will also be very interested. I will demonstrate a quick example of how to use these Windows cross-compilers.

In this demo, I will use gerbv, a gerber viewer and the example “Temperature Collector” developed by Levente Kovacs.


FEL: Improving collaborative hardware development experience

Thursday, June 11th, 2009

One of the many faces of digital hardware design entails tracking many files to be fed to multiple EDA tools. The eventual reports or netlists are carefully analysed and logged as part of the sign-off methodology. Each company tracks these project dependent files under a certain directory structure and under a certain revision controlled system of their choice.

The development cycle Fedora Electronic Lab 12 has started. One key feature for the next Fedora 12 release will be improving “collaborative hardware development experience” on Fedora. As a test-case scenario, let’s imagine 4 persons (from 4 different continents) have encountered each other using a particular social networking medium and want to engage into the development of a FPGA project.

While Fedora Electronic Lab already includes the respective simulators for digital design (VHDL/Verilog), waveforms viewers, schematic editors, PCB layout editor and Fedora’s different webserver and security solutions, these 4 persons (test-case scenario) should not have any issue with the latest Fedora 11 release.


Hello EDACafe!

Monday, June 1st, 2009

It is with great pleasure that today I’ve a featured blog on EDACafe. My name is Chitlesh Goorah. I will be exposing different opensource solutions which will interest both EDA engineers and ASIC designers.

Some of you may know me from my work behind Fedora Electronic Lab. For about three years now, we are proposing an opensource ASIC design and simulation platform, which is fairly well accepted by many universities around the world. We are working closely with many upstream projects such as gEDA, veripool, open circuit design, … in order to ensure interoperability between our solutions.

At the same time, Fedora developers are introducing Windows cross-compilers for the next version. Thereby, EDA vendors can also use Fedora or entreprise-class distribution such as RHEL or CentOS as a development ground for their products.

Later, I will introduce other features such as virtualisation, mass deployment, various design handoff checking facilities, … etc each accompanying with at least an example. Many designers and CAD engineers are already using opensource tools such as Vi, Emacs, svn, … I am looking forward to read your comments on my next posts.

DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL

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