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Donatella Sciuto, President of CEDA
Donatella Sciuto, President of CEDA
Ms. Sciuto received her Laurea in Electronic Engineering from the Politecnico di Milano in 1984. She received her Ph. D. in Electrical and Computer Engineering in 1988 from the University of Colorado, Boulder. She received her MBA from the Scuola di DIrezione Aziendale, Bocconi University, in 1991. … More »

IEEE Names Six Fellows from Within Council on EDA Ranks

 
December 18th, 2011 by Donatella Sciuto, President of CEDA

At CEDA, we are justifiably proud these days because six candidates from the Council have been appointed Fellow of the IEEE effective January 1, 2012.

Those elevated to the Class of 2012 IEEE Fellow from CEDA are: Naehyuck Chang from Seoul National University for contributions to system-level power characterization, including thermal management; Chong-Nuen Chu of Iowa State University for contributions to physical design of integrated circuits; and Alper Demir at Koc University in Turkey for contributions to stochastic modeling and phase noise analysis.

We also congratulate: Rudy Lauwereins from IMEC for contributions to data flow models in real-time prototyping; Luis Silveira from the Technical University of Lisbon for contributions to analysis and modeling of VLSI interconnects; and Stephen Trimberger of Xilinx, Inc. for contributions to circuits, architectures and software technology for field-programmable gate arrays.

As many of you know, the IEEE Fellow is conferred by the IEEE board of directors and is a distinction reserved for select IEEE members who have made extraordinary accomplishments in any of the IEEE fields. It is the highest grade of membership and is recognized by the technical community as a prestigious honor and an important career achievement.

Our six candidates have made enormous and varied contributions to the advancement of design automation. Their achievements have had profound effects on our community, so I’m sure you join us in a hearty thank you for their work. Please be sure to congratulate them when you see them at upcoming industry events.

Now Available: Video of “Watts Next” from NVIDIA’s Chris Malachowsky

 
December 12th, 2011 by Dwight Hill, Principal Engineer

A packed room of ICCAD attendees was treated to a presentation by Chris Malachowsky, NVIDIA Fellow and Senior Vice President of Research, on “Watts Next …” last month.
He lived up to his promise and explained in detail why it is essential to make the most economical and efficient use of power. He illustrated why power efficiency applies across NVIDIA’s broad range of processor offerings from supercomputers to cell phones.

For those of you who didn’t get to Chris’ talk, it’s now available in video and can be viewed here: http://dr-assoc.net/ICCAD-110811/ICCAD-110811.html. It’s missing the video that Chris showed during the talk, but we’re working to insert them.

For more information on CEDA, visit us at: www.c-eda.org.

Donatella Sciuto to Become CEDA President

 
November 14th, 2011 by Dr. John Darringer, Manager of System-Level Design, IBM
Professor Donatella Sciuto from Politecnico di Milano in Italy will begin serving a two-year term as CEDA president January 1.

Sets Goals for Better Coordination of Design Automation Activities, Greater Participation from EDA

When Professor Donatella Sciuto from Politecnico di Milano in Italy assumes the two-year term as CEDA president in January, she will begin implementing goals that include better coordination with IEEE design automation activities and encouraging greater participation from the EDA community. 

Helping her meet these goals will be a new slate of officers, two of whom are assuming new positions responsible for working more closely with CEDA’s six IEEE sponsoring societies, four technical committees and the growing number of CEDA chapters. 

The six sponsoring IEEE societies are Antennas and Propagation; Circuits and Systems; Computer; Electron Devices; Microwave Theory and Techniques; and Solid State Circuits.  Its four technical committees include the Computer-Aided Network DEsign (CANDE), Design and Test, Design Technology Council and the Test Technology Technical Council.  CEDA Chapters have been formed in Belgium, Brazil, Taiwan, Tunisia, with chapters being formed in China and Texas.

The new positions will be filled by William Joyner, director of Computer-Aided Design and Test at Semiconductor Research Corporation (SRC), who will become vice president of strategy.  Professor Rajesh Gupta of the University of California at San Diego will assume the role of vice president of publicity.

Andreas Kuehlmann, senior vice president of R&D at Coverity, who has served as the CEDA president since January 2010, will become past president.  Other incoming officers include Sani Nassif, manager at IBM, who has been named president-elect, and Yao-Wen Chang, professor at the National Taiwan University, who will become secretary.  David Atienza, professor and director of the Embedded Systems Laboratory at EPFL, will serve as vice president of conferences.  Shishpal Rawat, Intel’s director of business enabling programs within the design technology solutions group, will fill the role of vice president of finance.

Elected to the position of Vice President of Publications is Professor Sachin Sapatnekar from the University of Minnesota, while Joel Phillips, research scientist at Cadence, will become vice president of activities. 

Also elected for 2012-13 term are seven standing committee chairs, including:

  • Awards David Yeh, SRC’s director of Integrated Circuit and Systems Sciences
  • Conferences David Atienza
  • Constitution and Bylaws Professor Bryan Ackland of Stevens Institute of Technology
  • Finance Shishpal Rawat
  • Nominations Andreas Kuehlmann
  • Publications Sachin Sapatnekar
  • Activities Joel Phillips

Each will serve for a two-year term that begins January 1, 2012, and ends December 31, 2013.

In a future blog post, Andreas Kuehlmann will formally introduce Donatella Scuito.

Catch NVIDIA’s Chris Malachowsky Presentation on “Watts Next” During ICCAD

 
October 24th, 2011 by Dwight Hill, Principal Engineer

Chris Malachowsky, renowned NVIDIA fellow and senior vice president of research, will regale ICCAD attendees with a talk on “Watts Next …” during a noontime luncheon hosted by CEDA November 8 at the Doubletree Hotel in San Jose, Calif.

We’re delighted Chris accepted our invitation. He’s promised to explain why it is essential to make the most economical and efficient use of power. We’ll learn how power efficiency applies across NVIDIA’s broad range of processor offerings from supercomputers to cell phones.

As many of you know, Chris co-founded NVIDIA in 1993 and is currently responsible for NVIDIA’s research organization chartered with developing strategic technologies that will help drive the company’s future growth and success. He has been instrumental in managing, defining and driving NVIDIA’s core technologies as it has grown from a startup to the global leader in visual and parallel computing. As an executive at NVIDIA, his roles have been diverse, heading numerous functions, including IT, operations, and all facets of its product engineering.

Previously, Chris held engineering and technical leadership positions at HP and Sun Microsystems. He is a recognized authority on integrated-circuit design and methodology, and has authored close to 40 patents. Chris holds a Bachelor of Science degree in Electrical Engineering degree from the University of Florida and a Master of Science degree in Computer Science degree from Santa Clara University. Both schools have honored him with Distinguished Alumnus awards.

I look forward to seeing you at Chris’ talk. It is open to all full ICCAD conference and Tuesday conference-only registrants.

The ICCAD website can be found at: http://iccad.com/

You’re Invited to the Phil Kaufman Award Dinner November 8

 
October 21st, 2011 by Dr. Kuehlmann, Sr. VP of R&D, Coverity Inc. and CEDA President

Please join CEDA and the EDA Consortium for the Phil Kaufman Award Dinner honoring Dr. C. L. David Liu, the William Mong honorary chair professor of Computer Science and former president of the National Tsing Hua University in Hsinchu, Taiwan. The dinner will be held Tuesday, November 8, at the Double Tree Hotel in San Jose, Calif.

Dr. Liu, a well-respected figure in our industry, is a distinguished engineer and educator, as well as an astute business leader. His fundamental and seminal work transformed ad hoc EDA to algorithmic EDA. His contributions have been incorporated in various tools that have impacted numerous market segments. Many of Dr. Liu’s students, influenced by his passion for EDA, have made their own impressive marks in our field.

The annual Phil Kaufman Award honors individuals who have made an impact on the field of EDA and posthumously named for Phil Kaufman, an industry pioneer who turned innovative technologies into commercial businesses that have benefited electronic designers. Last year’s recipient, Pasquale (Pat) O. Pistilli, chairman of MP Associates of Louisville, Colo., pioneered the EDA industry and built DAC as its premiere showcase and networking platform.

For more details or to register to attend the award dinner, go to www.edac.org/events11/kaufman/index.jsp

To read more about Dr. Liu’s many accomplishments, check out the IEEE CEDA blog post found at www10.edacafe.com/blogs/ceda/

Dr. C. L. David Liu to Receive This Year’s Phil Kaufman Award

 
September 13th, 2011 by Dr. John Darringer, Manager of System-Level Design, IBM

CEDA and the EDA Consortium will present Dr. C. L. David Liu, the William Mong honorary chair professor of Computer Science and former president of the National Tsing Hua University in Hsinchu, Taiwan, with this year’s Phil Kaufman Award for Distinguished Contributions to EDA. He will receive the award at a dinner ceremony November 8 at the Doubletree Hotel in San Jose, Calif.

Dr. C. L. David Liu will receive this year’s Phil Kaufman Award for Distinguished Contributions to EDA

As chair of the Kaufman Selection Committee and past president of CEDA, I’ve had the privilege of presiding over the selection of the yearly recipient. Dr. Liu is a respected figure who has done fundamental and seminal work in EDA and well deserving of the honor. He is a distinguished engineer and educator, and an astute business leader. His contributions have been incorporated in many commercial tools and have impacted numerous market segments. He was a professor at the University of Illinois at Urbana Champaign from 1973-1998. After his return to Taiwan in 1998, he became president of National Tsing Hua University until 2002. Many of his students, influenced by his passion for EDA, have made their own impressive marks in our field.

Early in his career, Dr. Liu led the transformation from ad hoc EDA to algorithmic EDA. He was an early advocate for more rigorous design automation, reasoning that powerful, formal algorithmic techniques were essential to the effective solution of complex design automation problems. His technical contributions are at the foundation of numerous current EDA tools within several disciplines, including behavioral synthesis, logic synthesis and physical design.

His technical impact includes the first floorplanning algorithms and scheduling algorithms for hard real-time tasks. His research on floorplanning received DAC’s Best Paper Award in 1986 and has been widely regarded as seminal. Dr. Liu’s work on Rate Monotonic Scheduling (RMS) is a cornerstone of modern scheduling theory, applicable in the design of real-time operating systems. As of today, his 1973 paper on the subject has more than 7,000 citations.

Over the past 12 years, his contribution to Taiwan’s semiconductor industry has been broad and significant. He serves as chairman of the board of TrendForce, a market intelligence provider in the DRAM, LED, LCD and Solar Energy technical segments. He is a member of the board of Powerchip Semiconductor Corp., United Microelectronics Corp., MediaTek and Macronix International Co., Ltd. Additionally, he is a member of the board of Anpec Electronics Corporation, Andes Corporation, and Cadence Methodology Service Company.

If that isn’t enough, he has hosted for the last six years a weekly radio show on technology, natural science, social science, and literature in Taiwan. He has published three essay collections based on the presentations in the show. One of them is a 2011 winner of a prestigious book award in the category of popular science.

The Phil Kaufman Award honors individuals who have made an impact on the field of EDA and pays tribute to Phil Kaufman, the late industry pioneer who turned innovative technologies into commercial businesses that have benefited electronic designers. Last year’s recipient was Pasquale (Pat) O. Pistilli, chairman of MP Associates of Louisville, Colo., who pioneered the EDA industry and built DAC as its premiere showcase and networking platform.

To register to attend the 2011 award dinner, go to: http://www.edac.org/events11/kaufman/index.jsp.

Valeria Bertacco of the University of Michigan to Receive Early Career Award

 
August 9th, 2011 by Donatella Sciuto, President of CEDA

It gives me great pleasure to announce that Valeria Bertacco, associate professor of Electrical Engineering and Computer Science at the University of Michigan, will receive this year’s Early Career Award from the IEEE Council on Electronic Design Automation (CEDA).

Professor Bertacco will be recognized for her contributions to hardware verification, including her work on semi-formal verification, runtime and post-silicon verification, and correctness-constrained execution, during ICCAD’s opening session in November in San Jose.

With research interests in the area of design correctness, with emphasis on full design validation, digital system reliability and hardware security assurance, her creativity and technical contributions are well recognized throughout the industry.

Professor Bertacco joined the faculty at the University of Michigan in 2003 after working in Synopsys’ Advanced Technology Group for four years as a lead developer of two verification software tools, Vera and Magellan. She received a Master of Science and Ph.D. degrees in Electrical Engineering from Stanford University and a Computer Engineering degree (Dottore in Ingegneria) summa cum laude from the University of Padova in Italy.

She recently was presented with a 2011 IBM Faculty Award for her work in design correctness, full design validation, digital system reliability and hardware security assurance. The recipient of a National Science Foundation Career award, she has also been honored with the University of Michigan’s Outstanding Achievement award and the Air Force Office of Scientific Research’s Young Investigator award.

Additionally, Professor Bertacco serves in several conference program committees, including DATE and DAC, and is an associated editor for the IEEE Transactions on CAD and the Microelectronics Journal. She is the author of three books on design validation, from pre-silicon to runtime and is actively working with Addis Ababa University in Ethiopia to modernize their computer engineering program.

CEDA established the first Early Career Award in 2009 to recognize an individual who has made innovative and substantial technical contributions to the area of EDA in the early stages of her or his career. The first recipient was Professor Igor Markov from the University of Michigan, and in 2010, the award went to Professor Luca Daniel form MIT.

The annual award recognizes an individual who has made innovative and substantial technical contributions to the area of EDA in the early stages of her or his career. Contributions are measured by the technical merit and creativity in performing research, and assessed based on the published record of the individual and the references accompanying the nomination. The award is equally available to contributors from academic and industrial institutions.
 Professor Valeria Bertacco

Discussions between Design Technology Committee, EDA vendors off to a Good Start

 
August 2nd, 2011 by Thomas Harms, Chair Design Technology Committee, IEEE Council on EDA

IEEE CEDA’s Design Technology Committee (DTC) invited EDA vendors to join us for an open meeting during DAC in June for EDA vendors to talk about gaps and requirements for two design flow areas –– digital implementation and functional verification.

We were pleased that 18 representatives from eight EDA companies attended the meeting, which turned out to be an open and informative exchange. Overall, attendees were supportive of our goals and efforts.

With participation from Cadence, Magma, Mentor and Synopsys, all four major EDA vendors were present. They were joined by Atrenta, Jasper, SpringSoft and Tuscany. Each has an interest in digital implementation and functional verification, and DTC study groups have established a common list of near-term gaps and requirements for both. After outlining the goals and objectives and the high-level overview of the gaps and requirements, a good discussion followed.

It was understood by the EDA companies that the DTC study groups compiled a prioritized and substantial set of common core requirements. Implementing each of the top three requirements over the next 12-18 months would address a substantial amount of our current issues.

The meeting helped to define our key objectives that include efficient discussion, clarification and implementation of such common requirements so that more bandwidth is available to engage for the advanced requirements. Follow-up actions were identified and DTC study groups are currently discussing gaps and future requirements with EDA vendors. To manage the competitive nature of the EDA industry, these are individual meetings.

The next major milestone review will be held during ICCAD in early November at the Doubletree Hotel in San Jose, Calif. The DTC and EDA vendors will meet to discuss findings from this process to review the status of the implementation roadmaps and to identify further actions.

For DTC member companies, the past year was a good experience in working together on common technical topics. As we expand the participation to include EDA vendors, we believe this creates efficiencies and benefits for all EDA users. Further discussions can then go beyond feature requirements to encompass use model and methodology improvements.

Under IEEE CEDA, DTC currently represents 12 leading IC companies and was formed to identify and gather common concerns, gaps and requirements for EDA and to voice them and to bring them to the attention of the EDA industry.

For more information, visit: www.c-eda.org/dtcommittee.

Now Available: Video of DAC Lunch Presentation on Truths and Myths of Embedded Computing

 
June 24th, 2011 by Shishpal Rawat, Vice President of Technical Activities for CEDA

CEDA’s Distinguished Speaker Series video library now includes the talk by Shekhar Borkar, director of Intel’s Microprocessor Technology Lab, presented during DAC earlier this month.

Borker titled his presentation “Truths and Myths of Embedded Computing” and went on to describe how computers have become ubiquitous and well-accepted tools, while the embedded computing discipline does not get its fair share of attention. If you missed his presentation, don’t miss an opportunity to view the video recording that provides insight into building supercomputing capabilities with the efficiency of embedded computing. This talk is in sharp contrast to the “Beyond von Neumann architecture” talk presented by Steve Tieg last year, also available for viewing in our video library. We have Dwight Hill, principal engineer at Synopsys, to thank for organizing such a great talk from an engaging speaker.

The video, along with others from the Distinguished Speaker Series, can be found at:
www.c-eda.org/index.php?menuphp=menu_dss&mainpage=distinguished

For more information about CEDA, visit: www.c-eda.org.

Four Achievement Awards to be Presented During DAC Next Week

 
June 1st, 2011 by Donatella Sciuto, President of CEDA

Please join us at DAC next week as we recognize outstanding contributions to EDA with the presentation of four achievement awards. They will be given during the opening session of DAC next Tuesday –– June 7 –– at the San Diego Convention Center.

It gives me great pleasure to announce the award recipients because they are all well-known and well-respected leaders of our industry, and highly deserving. Each one sets a high standard and example for the rest of us.

The first award is the Donald Pederson Award that recognizes the best paper published in the IEEE Transactions on Computer-Aided Design. Recipients are Professor Rob A. Rutenbar, Abel Bliss professor and department head of the Computer Science Department at the University of Illinois at Urbana-Champaign, and Amith Singhee, member of the research staff at IBM. They wrote “Statistical Blockade: Very Fast Statistical Simulation and Modeling of Rare Circuit Events and Its Application to Memory Design” that appeared in the August 2009 issue.

Up next is the A. Richard Newton Technical Impact Award, awarded jointly by CEDA and the ACM Special Interest Group on Design Automation (SigDA), will be given to Professor Jason Cong of UCLA and Dr. Yuzheng (Eugene) Ding, senior staff software engineer at Xilinx. The award honors contributors whose impact is recognized over a significant period of time. Professor Cong and Dr. Ding will be recognized for their pioneering work on technology mapping for field programmable gate arrays (FPGAs).

The IEEE CEDA Outstanding Service Contribution Award will be presented to Professor Sachin Sapatnekar from the University of Minnesota for significant service as the general chair of the 47th DAC.

During the session, Pasquale (Pat) O. Pistilli, chairman of MP Associates of Louisville, Colo., will receive the Phil Kaufman Award, presented by CEDA and the Electronic Design Automation Consortium.

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