It gives me great pleasure to announce that Valeria Bertacco, associate professor of Electrical Engineering and Computer Science at the University of Michigan, will receive this year’s Early Career Award from the IEEE Council on Electronic Design Automation (CEDA).

Professor Bertacco will be recognized for her contributions to hardware verification, including her work on semi-formal verification, runtime and post-silicon verification, and correctness-constrained execution, during ICCAD’s opening session in November in San Jose.

With research interests in the area of design correctness, with emphasis on full design validation, digital system reliability and hardware security assurance, her creativity and technical contributions are well recognized throughout the industry.

Professor Bertacco joined the faculty at the University of Michigan in 2003 after working in Synopsys’ Advanced Technology Group for four years as a lead developer of two verification software tools, Vera and Magellan. She received a Master of Science and Ph.D. degrees in Electrical Engineering from Stanford University and a Computer Engineering degree (Dottore in Ingegneria) summa cum laude from the University of Padova in Italy.

She recently was presented with a 2011 IBM Faculty Award for her work in design correctness, full design validation, digital system reliability and hardware security assurance. The recipient of a National Science Foundation Career award, she has also been honored with the University of Michigan’s Outstanding Achievement award and the Air Force Office of Scientific Research’s Young Investigator award.

Additionally, Professor Bertacco serves in several conference program committees, including DATE and DAC, and is an associated editor for the IEEE Transactions on CAD and the Microelectronics Journal. She is the author of three books on design validation, from pre-silicon to runtime and is actively working with Addis Ababa University in Ethiopia to modernize their computer engineering program.

CEDA established the first Early Career Award in 2009 to recognize an individual who has made innovative and substantial technical contributions to the area of EDA in the early stages of her or his career. The first recipient was Professor Igor Markov from the University of Michigan, and in 2010, the award went to Professor Luca Daniel form MIT.

The annual award recognizes an individual who has made innovative and substantial technical contributions to the area of EDA in the early stages of her or his career. Contributions are measured by the technical merit and creativity in performing research, and assessed based on the published record of the individual and the references accompanying the nomination. The award is equally available to contributors from academic and industrial institutions.
 Professor Valeria Bertacco

IEEE CEDA’s Design Technology Committee (DTC) invited EDA vendors to join us for an open meeting during DAC in June for EDA vendors to talk about gaps and requirements for two design flow areas –– digital implementation and functional verification.

We were pleased that 18 representatives from eight EDA companies attended the meeting, which turned out to be an open and informative exchange. Overall, attendees were supportive of our goals and efforts.

With participation from Cadence, Magma, Mentor and Synopsys, all four major EDA vendors were present. They were joined by Atrenta, Jasper, SpringSoft and Tuscany. Each has an interest in digital implementation and functional verification, and DTC study groups have established a common list of near-term gaps and requirements for both. After outlining the goals and objectives and the high-level overview of the gaps and requirements, a good discussion followed.

It was understood by the EDA companies that the DTC study groups compiled a prioritized and substantial set of common core requirements. Implementing each of the top three requirements over the next 12-18 months would address a substantial amount of our current issues.

The meeting helped to define our key objectives that include efficient discussion, clarification and implementation of such common requirements so that more bandwidth is available to engage for the advanced requirements. Follow-up actions were identified and DTC study groups are currently discussing gaps and future requirements with EDA vendors. To manage the competitive nature of the EDA industry, these are individual meetings.

The next major milestone review will be held during ICCAD in early November at the Doubletree Hotel in San Jose, Calif. The DTC and EDA vendors will meet to discuss findings from this process to review the status of the implementation roadmaps and to identify further actions.

For DTC member companies, the past year was a good experience in working together on common technical topics. As we expand the participation to include EDA vendors, we believe this creates efficiencies and benefits for all EDA users. Further discussions can then go beyond feature requirements to encompass use model and methodology improvements.

Under IEEE CEDA, DTC currently represents 12 leading IC companies and was formed to identify and gather common concerns, gaps and requirements for EDA and to voice them and to bring them to the attention of the EDA industry.

For more information, visit: www.c-eda.org/dtcommittee.

CEDA’s Distinguished Speaker Series video library now includes the talk by Shekhar Borkar, director of Intel’s Microprocessor Technology Lab, presented during DAC earlier this month.

Borker titled his presentation “Truths and Myths of Embedded Computing” and went on to describe how computers have become ubiquitous and well-accepted tools, while the embedded computing discipline does not get its fair share of attention. If you missed his presentation, don’t miss an opportunity to view the video recording that provides insight into building supercomputing capabilities with the efficiency of embedded computing. This talk is in sharp contrast to the “Beyond von Neumann architecture” talk presented by Steve Tieg last year, also available for viewing in our video library. We have Dwight Hill, principal engineer at Synopsys, to thank for organizing such a great talk from an engaging speaker.

The video, along with others from the Distinguished Speaker Series, can be found at:
www.c-eda.org/index.php?menuphp=menu_dss&mainpage=distinguished

For more information about CEDA, visit: www.c-eda.org.

Please join us at DAC next week as we recognize outstanding contributions to EDA with the presentation of four achievement awards. They will be given during the opening session of DAC next Tuesday –– June 7 –– at the San Diego Convention Center.

It gives me great pleasure to announce the award recipients because they are all well-known and well-respected leaders of our industry, and highly deserving. Each one sets a high standard and example for the rest of us.

The first award is the Donald Pederson Award that recognizes the best paper published in the IEEE Transactions on Computer-Aided Design. Recipients are Professor Rob A. Rutenbar, Abel Bliss professor and department head of the Computer Science Department at the University of Illinois at Urbana-Champaign, and Amith Singhee, member of the research staff at IBM. They wrote “Statistical Blockade: Very Fast Statistical Simulation and Modeling of Rare Circuit Events and Its Application to Memory Design” that appeared in the August 2009 issue.

Up next is the A. Richard Newton Technical Impact Award, awarded jointly by CEDA and the ACM Special Interest Group on Design Automation (SigDA), will be given to Professor Jason Cong of UCLA and Dr. Yuzheng (Eugene) Ding, senior staff software engineer at Xilinx. The award honors contributors whose impact is recognized over a significant period of time. Professor Cong and Dr. Ding will be recognized for their pioneering work on technology mapping for field programmable gate arrays (FPGAs).

The IEEE CEDA Outstanding Service Contribution Award will be presented to Professor Sachin Sapatnekar from the University of Minnesota for significant service as the general chair of the 47th DAC.

During the session, Pasquale (Pat) O. Pistilli, chairman of MP Associates of Louisville, Colo., will receive the Phil Kaufman Award, presented by CEDA and the Electronic Design Automation Consortium.

An Open letter to the EDA industry:

The Design Technology Committee (DTC) invites EDA vendors to join us for a meeting at DAC to share with you the results of our study groups on EDA gaps and requirements requiring your near-term attention in the areas of the digital implementation flow and functional verification.

DTC Study Groups
The Design Technology Committee (DTC, http://www.c-eda.org/dtcommittee) under IEEE CEDA currently represents 12 leading IC companies to identify and gather our common concerns, gaps and requirements for EDA and to voice them and to bring them to the attention of the EDA industry.

For this purpose, the DTC had established two study groups to detail our common EDA gaps and requirements requiring your near-term attention in the areas of the digital implementation flow and functional verification.

A first set of results is now available.

We want to invite you to join the DTC for a meeting at DAC to share with you our motivation and background for this activity as well as to review these results. We then want to discuss concrete next steps/ actions how to address these gaps and requirements. The near-term goal is to review your progress at a meeting during ICCAD in November.

Meeting Venue
The meeting will take place Monday, June 6, from 11:30 a.m.-1:45 p.m. at the Marriott Hotel next to the Convention Center.

This meeting is open to EDA vendors active in these two design flow areas.

Scope
We want someone with the authority and the influence to discuss and commit to concrete actions and timelines as a result of this meeting. These actions include assigning of technical experts to our study group, adjusting your technical implementation schedules to incorporate our requirements, etc.

This meeting is not to discuss technical details but to create an alignment for common next steps and to identify concrete actions.

The results of both study groups will be presented in the DAC User Track as well.

Please contact me for the current results and background information for your review prior to the meeting.

Thank you and best regards,

Thomas Harms
Chairman of the Design Technology Committee
Thomas.Harms@infineon.com

Nominations for will be accepted until Thursday, June 30, for this year’s Phil Kaufman Award for Distinguished Contributions EDA sponsored by the EDA Consortium (EDAC) and the IEEE Council on EDA. Don’t miss the opportunity to nominate someone you know who has had a major impact on the field of EDA in business, industry direction, promotion, technology and engineering or educational or mentoring. Areas of technology and engineering impact have been expanded this year to include: analog and RF; architecture, structures and FPGA; embedded systems; formal verification; design; design for manufacturing; intellectual property; layout; simulation; synthesis; and test. Impartiality is provided to all nominees, without regard to race, gender, age or national origin.

Last year’s recipient was Pasquale (Pat) O. Pistilli, chairman of MP Associates of Louisville, Colo., who pioneered the EDA industry and built the Design Automation Conference as its premiere showcase and networking platform.

The award will be presented at a dinner ceremony in October. It was established in 1994 in honor of EDA industry pioneer Phil Kaufman, who turned innovative technologies such as silicon compilation and emulation into businesses that have benefited electronic designers.

The nomination form can be found at: http://www.edac.org/about_kaufman_award.jsp#nominations

I’m pleased to report that Shekhar Borkar, director of Intel’s Microprocessor Technology Lab, will present a talk during DAC titled, “Truths and Myths of Embedded Computing,” as part of CEDA’s Distinguished Speaker Series. The talk will be held during lunch Tuesday, June 7, from noon-2 p.m. in Room #25AB at the San Diego Convention Center, San Diego, Calif.

Organized by Dwight Hill, principal engineer at Synopsys, it is open to all DAC attendees. Lunch will be available on a first-come, first-served basis and because seating is limited to 150. If you plan on attending, please come early.

This is one session you won’t want to miss. According to Borkar, who hails from Portland, Ore., computers have become ubiquitous, from powerful data centers housing supercomputing clusters to tiny microcontrollers in your toothbrush. However, he notes, the embedded computing discipline does not get its fair share of attention.

During his talk, Borkar will define the scope of embedded computing, compare it to general purpose computing with appropriate metrics, challenge the myths that float around and uncover the truths. He will discuss challenges in architecture, design and test of future embedded computers, which will become omnipresent, even that will become even more ubiquitous as part of general-purpose computers.

Borkar, an Intel Fellow at Intel Labs and director of the Microprocessor Technology Lab, is responsible for directing research in technologies for Intel’s future microprocessors. He joined Intel in 1981 and worked on the design of the 8051 family of microcontrollers, iWarp multicomputer and high-speed signaling technology for Intel supercomputers. Borkar is an adjunct member of the faculty of the Oregon Graduate Institute, and has published more than 60 articles and holds 41 patents.

Borkar received a Master of Science degree in Electrical Engineering from the University of Notre Dame in 1981, and Master of Science and Bachelor of Science degrees in Physics from the University of Bombay in 1979.

Be prepared for a thought-provoking and stimulating lunch. We look forward to seeing you.

For more information about our Distinguished Speaker Series or details on CEDA, visit: www.c-eda.org.

The DAC website can be found at: www.dac.com.

Now that the DAC program has gone live (check it out at www.dac.com) and registration has opened, it’s time to start making plans for the week of June 5-10 at the San Diego Convention Center in San Diego, Calif.

As a DAC sponsor, CEDA and its officers are especially proud of this year’s program and look forward to your participation. In particular, I’d like to draw your attention to the 23 co-located events and workshops. Truly, there is something for everyone this year!

CEDA is also a technical sponsor of The Workshop on Parallel Algorithms, Programming and Architectures (PAPA) which will be held Sunday, June 5. It will include invited talks that address three main categories of parallelism research to improve the understanding of progress and open problems in the cross-coupled fields of programming, algorithms and architectures. Additionally, it will serve to facilitate discussions for a better understanding of the most recent algorithms, languages and architectures.

Here’s a list of events and workshops:
• International Workshop on Logic and Synthesis (IWLS)
• 9th IEEE Symposium on Application Specific Processors (SASP 2011)
• IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2011)
• System-Level Interconnect Prediction (SLIP)
• Workshop on Diagnostic Services in Network-on-Chips: Test, Debug and On-Line Workshop on Design, Analysis and Implementation of Real-Time Systems with Time-Triggered and Event-Triggered Applications
• Workshop on Parallel Algorithms, Programming and Architectures (PAPA)
• Workshop on Intra and Inter-Vehicle Networking: Past, Present and Future
• Workshop on Using the Power of the SystemC AMS Extensions
• Workshop on Universal Verification Methodology (UVM) –– Verifying Blocks to IP to SoCs and Systems
• Introduction to Chips and EDA for a Non-Technical Audience
• NASA/ESA Adaptive Hardware and Systems (AHS)
• SIGDA Design Automation Summer School
• International Workshop on Bio-Design Automation (IWBDA)
• IEEE Design for Manufacturing and Yield (DFM and DFY) Workshop
• Synergies in IC Design: PDK and DFM Standards Working Together
• OpenAccess Scripting Language Workshop
• ACM Student Research Competition
• IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH ‘11)
• CELUG/EDA Consortium Co-located Event
• Workshop on Building Blocks for Scalable Cloud Systems
• Workshop on Smart Grid and Design Automation II
• Workshop on Multiprocessor SoC for Cyber Physical Systems: Programmability, Run-Time Support and Hardware Platforms for High-Performance Embedded Applications

For more details on these events and the entire DAC program, go to: www.dac.com.

In addition to these events, CEDA will once again host a luncheon and guest speaker during DAC. Stay tuned to this blog for more information.

And, with DAC less than two months from now, don’t delay in making your plans.

I’m pleased to announce nominations have opened for the third annual IEEE CEDA Early Career Award. The award, to be presented at ICCAD in November, recognizes an individual who has made innovative and substantial technical contributions to EDA in the early stages of his or her career.

The award is based on contributions to EDA, measured by technical merit and creativity in performing research, and will be assessed by the published record of the individual and references accompanying the nomination. It is meant to be equally available to contributors from academic and commercial ventures.

Full members of the IEEE at any level, regular, senior or fellow grades, whose highest educational degree has been awarded no more than eight years prior to the date of the nomination deadline, are eligible.

Professor Igor L. Markov, associate professor of Electrical Engineering and Computer Science from the University of Michigan, was the first recipient of this award. Dr. Daniel, Emanuel E. Landsman associate professor of Electrical Engineering at Massachusetts Institute of Technology, was the 2010 recipient.

Know of someone? You need to act fast for the deadline is Friday, April 15.

Some things to consider when developing the nomination:
• Biographical information, including education and employment history
• Three professional references or endorsements, with:
• A selection of no more than three papers published by the nominee, with comments by the nominator limited to 100 words per paper
• A description of projects led by or contributed to by the nominee, with clear articulation of the role the nominee played and the relevant contributions.

The nomination can be made by anyone who is familiar with the individual’s work. Nominations should be submitted by email to:
CEDA-EarlyCareerAward@ieee.org

For more information, visit www.ceda.org.

Looking back on 2010, I’m struck by the range of industry outreach from the IEEE Council on EDA (CEDA)’s volunteers, with programs that include awards, events and publications. Before we go rushing into 2011, please bear with me as I do a bit of bragging about the past year.

CEDA recognizes the contributions of outstanding members of the EDA community by sponsoring or co-sponsoring four annual awards. In 2010, we recognized Dr. Al Dunlop, Dr. Giovanni De Micheli and Dr. Dick Smith with the Distinguished Service Award for establishing the IEEE Council on EDA.

Dr. Randal E. Bryant of Carnegie Mellon University received the ACM/IEEE A. Richard Newton Technical Impact Award in EDA for developing Reduced Ordered Binary Decision Diagrams, forming the foundation for symbolic manipulation of logic designs.

Dr. Luca Daniel, Emanuel E. Landsman associate professor of Electrical Engineering at Massachusetts Institute of Technology, was the recipient of the Early Career Award. Professor Daniel was recognized for his contribution to electromagnetic field analysis, parasitic variation-aware extraction and automated parameterized linear and non-linear stable model reduction.

And finally, Pat Pistilli was selected to receive the 2010 Kaufman award from CEDA and the Electronic Design Automation Consortium. He received it for pioneering the EDA industry and building the Design Automation Conference (DAC) as its premier showcase and networking platform.

Our sincere thank you to the 2010 award recipients for their contributions to the industry, along with hearty congratulations to all.

CEDA is a sponsor or co-sponsor of many of the leading conferences, workshops, industries events and meetings worldwide, and I’m delighted to announce that CEDA became a major sponsor of DATE, the key European EDA conference. We took over in 2010 the entire IEEE sponsorship share from the Computer Science Society.

The list of events is long and impressive, and too long for this post. Instead, let’s highlight some of the more visible industry events in addition to DATE, such as DAC, ICCAD and CANDE in the U.S. and ASP-DAC in Asia.

We offered two luncheon events at DAC and ICCAD as part of our ongoing Distinguished Speaker Series. Steve Teig, president and CTO of Tabula, described to an attentive DAC audience an approach to move beyond von Neumann computing. Dr. Lucio Lanza, managing director of Lanza techVentures, opined on “Semiconductor and EDA Industry –– A new business model?” to a packed room during ICCAD. If you missed either, do not be concerned. Both were videotaped and these videotapes are available for viewing at the CEDA website.

CEDA produces four publications: Embedded Systems Letters (ESL), a forum for quick dissemination of research on embedded systems; Design and Test (D&T), both print and in an electronic format; and Transactions on Computer Aided Design (TCAD).

These activities are done by a tireless group of volunteers. As president of CEDA, I am grateful for their ongoing support and offer each one of you an opportunity to get involved as well. If you are interested, visit the CEDA website to learn more.