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Archive for the ‘Analog’ Category

Q&A with Altera: How to improve your advanced-node design productivity using Synopsys SPICE Simulation and Analysis environment

Tuesday, December 15th, 2015

Greetings,

You may have noticed from my previous post that we had a very successful event in Austin. I therefore wanted to share with you some of the technical content.  One of the aspects we cover is the increasing amount of analysis and debugging that needs to be done as design companies are moving to advanced process nodes.  While SPICE simulators keep improving performance and algorithms to allow designers to run more simulations faster, designers are left with an increasing large amount of data they need to be able to analyze and debug quickly.  Synopsys SPICE simulation environment provides a standalone solution to quickly simulate, analyze and debug advanced design nodes design to improve your productivity and reduce your design cycle.

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Optimized Synopsys-MathWorks solution for System-Level Verification

Thursday, November 14th, 2013

Verification continues to be the most challenging, expensive, and time-consuming phase in ASIC and SoC design processes today. This has been true for many years, and is expected to continue for the foreseeable future. On the business side, semiconductor design is no longer confined to “semiconductor” companies. In the past few years, many electronics, communication, and computer equipment companies have brought ASIC and SoC design activities back in-house. They now consider these designs to be competitive differentiators and crucial intellectual property rather than commodities that should be outsourced. This is – in significant part – driven by an increase in mathematical algorithmic content being engineered into signal, image and video processing, and mixed-signal designs

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Behavioral Modeling Approaches for Analog, Mixed-Signal, and RF- Latest trends from experts at our DesignCon AMS tutorial

Tuesday, January 22nd, 2013

As a chair(wo)man for the AMS track at DesignCon, I wanted to talk about a special event I put together for DesignCon AMS track. I specifically created this year a tutorial to emphasize on behavioral modeling. Because DesignCon is a broad conference, going from chip design to signal integrity and board level design, I wanted to cover different modeling techniques available for Analog, Mixed Signal and/or RF. My end goal was not only to give some general insights to someone new to behavioral modeling  or someone expert for one type(for example VerilogAMS) that would like to get exposed to other techniques (such as Matlab/Simulink or real number modeling) but also to correlate/compare those modeling techniques by presenting pros and cons of each approach.

 

 

The tutorial can be accessed at:

http://www.designcon.com/santaclara/conference/tracks.php?session_id=268

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CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



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