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Archive for December, 2012

MTV 2012 Mixed Signal Verification Panel – Can Mixed Signal Verification be done with no analog solver ?

Monday, December 31st, 2012

Well, it has been a while, hasn’t it? No, I have not been lazy, I have just been busy working on Synopsys amazing portfolio of simulators.

I attended last week MTV (Microprocessor Test and Verification) conference in Austin (and no, that was not a music festival, sorry..), and participated in a panel on Mixed Signal Verification:

http://mtvcon.org/advance-program/

The panel included professionals from Design Houses, EDA vendors as well as Universities. Our goal was really to discuss about Digital verification extended to Mixed signal domain and current advantages and pitfalls in both simulation and environment through two main questions (I have listed those below).

(more…)

CST: Webinar series
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL



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