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Archive for the ‘Emulation/Acceleration’ Category

Last call from Engineer Santa. Survey & daily drawings end Dec 12.

Thursday, December 11th, 2014

Well folks, last call from Engineer Santa. Aldec’s #12DaysofUsefulGifts giveaway will end this Friday, December 12 at 12pm midnight Pacific Standard Time.[preview_cut]

If you haven’t registered yet, you’ll want to hurry and visit www.aldec.com/survey. There you will take a brief verification survey and be entered to win.

If you’ve been keeping up with us on Twitter and YouTube, you know that we’ve given away some fun prizes already. If you are looking for some practical and useful gift ideas for the holidays, you might want to take a closer look. I’ve already talked about some of these from Days #1-4. We’ve given away more prizes since then and sent them to engineers all over the globe! Here, take a look…

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Looking for Practical Holiday Gift Ideas?

Thursday, December 4th, 2014

Happy Holidays! We’ve made it to Day 4 of Aldec’s #12DaysofUsefulGifts giveaway. If you’ve been keeping up with us on Twitter and YouTube, you know that we’ve given away some fun prizes already. But that’s just the beginning, the prizes will get larger each day until the contest ends on December 12th!

If you are looking for some practical and useful gift ideas for the holidays, take a look at some of the fun prizes we’ve already given away.

Day #1day-1_400 Day #2day-2_400
Professional Cleaning Set for DSLR Cameras

Air Vent Mount for Cell Phones

Winner! Jonathan S.

Miles Kimball Manual Hand Held Shredder

Bushnell Falcon 7×35 Binoculars with Case

Winner! Alan S.

Day #3day-3_400 Day #4day-4_400
Magisso Tea Cup

Grillight LED BBQ Spatula

Winner! Daniel H.

Sugru Hardware Sealer

Pocketmonkey Wallet Multi-Tool

Could be you! Enter today at

www.aldec.com/survey

 

To enter Aldec’s #12DaysOfUsefulGifts drawing, visit www.aldec.com/survey. There you will take a brief verification survey and automatically be entered to win. You only need to take the survey once to be eligible for daily drawings from Dec 1st-12th. You can also earn additional chances to win by sharing the contest link and viewing the daily contest video. Follow Aldec on Twitter where we will announce each day’s winner and unveil the next day’s prize. Good luck!

 

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The 80s music at DAC was my idea. You’re welcome.

Tuesday, June 24th, 2014

If you attended the Monday Night Reception at DAC 2014, you were greeted with a blast of 80s pop music. If you then said to yourself, “I’d like to meet the genius behind that idea” – that would be me. A few weeks before DAC, our marketing manager came to me with the task of being the DJ for the Monday night reception. As soon as I heard “DJ” I envisioned turntables, cool headphones, disco lights and all the fame that follows. My dreams were dashed a few moments later when she explained that I would only have a PA and a laptop.

Undaunted, I resolved to be the best DJ in the history of DAC Monday Night Networking Receptions. The first challenge was finding music everyone would enjoy. I naturally settled on 80s pop as my genre. I had the brilliant idea of picking a few songs from each year and playing it as a progressive 80s timeline during the evening. I changed my mind when I realized that bright idea would require some serious manual research and work.

Did I give up? Of course not. I did what any good engineer would do – I found an easy (and smart) solution that did not require substantial extra effort – a bit like re-using verification ip’s instead of making them from scratch. This level of engineering genius is often mistakenly perceived as laziness, but I like to call it being smart. In fact I recently wrote a blog on the topic of working smart not hard.

For the rest of this article, visit the Aldec Design and Verification Blog.

Much has changed in the last 30 years

Friday, January 10th, 2014

When I first launched Aldec in 1984, home computers hadn’t quite taken off and innovations such as the compact disk and those oversized, power draining cellphones were still struggling to obtain mass acceptance.

Fast forward 30 years, even those of us in the electronics industry have whiplash from the speed at which technology is advancing and delivering new products. Buyers are more eager to become early adopters of innovative new technology, and smarter, faster tools are required to keep pace.

As a long-time member of the Electronic Design Automation (EDA) community, Aldec has had a front row seat to the technology race and over the years we have celebrated many successes of our own. Here, our product managers reflect on some of our most memorable highlights from 2013.

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Biggest Hits and Trends from ARM TechCon

Wednesday, November 6th, 2013

The recent ARM® TechCon Conference in Santa Clara was definitely the front-runner of my favorite conferences that I attended this year. Fun, informative and filled with software engineers, physical designers, design verification teams, and hardware engineers – ARM TechCon was the place to be to learn about the latest innovations from the embedded industry. Aldec was there showcasing our HES-DVM™ and HES-7™ platforms, which enable engineers to utilize emulation and FPGA-based prototyping to verify the latest ARM designs.

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Integrating SystemVerilog and SCE-MI for Faster Emulation Speed

Wednesday, October 9th, 2013

In the last SCE-MI article, we discussed how SCE-MI macro-based infrastructures can speedup SoC design verification time. In SCE-MI 2.1, Accelera introduced a ‘function-based’ infrastructure which is based on SystemVerilog DPI functionality. The SystemVerilog DPI is an interface which can be used to connect SystemVerilog files with foreign languages (C, C++, SystemC, etc).

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SCE-MI for SoC Verification

Wednesday, September 18th, 2013

Today’s System-on-Chip verification teams are moving up in the levels of abstraction to increase the degree of coverage in the system design. As designs grow larger, we start to see an increase in test time within our HDL simulations. Engineers can utilize Hardware-Assisted approaches such as simulation acceleration, transaction-level co-emulation, and prototyping to combat the growing simulation times of an RTL simulator. In this article, we’ll dive much deeper into the transaction-level co-emulation methodology.

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Leverage Hardware Acceleration for Faster Simulation

Wednesday, July 24th, 2013

Breaking the Bottleneck of RTL Simulation

Utilizing hardware acceleration in a System-on-Chip verification cycle can speed-up HDL simulation runs from 10-100x, while providing the robust debugging available from an RTL simulator. Acceleration (also referred to as Co-Simulation) combines the speed of FPGA-based prototyping boards, by offloading resource hungry modules into the FPGA, while non-synthesizable constructs of the testbench remain in the RTL simulator.

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Aldec and Xilinx, Partnered for Success

Monday, July 8th, 2013

HW/SW Emulation and Functional Verification of Xilinx FPGAs

As an Aldec Hardware Product Manager, I make the quick flight from our home base in Las Vegas to San Jose pretty regularly. This week, I’ll be joining Aldec Software Product Manager, Dmitry Melnik, as we head out to attend “Smarter 2013”, Xilinx’ annual Technical Sales Conference.

Since Aldec is a Xilinx Alliance Member, we have been invited to showcase our solutions at their conference’s Partner Night. Working closely with key technology partnerships like Xilinx has long been the cornerstone to Aldec’s success. Our mutual customers have benefited from these alliances, the result of hard work, open communication and close interaction between our teams.

Most recently, we’ve been syncing with our counterparts at Xilinx to fulfill the verification requirements of the newest SoC designs, as Aldec provides EDA solutions at every stage of development. Users can leverage the latest Xilinx ISE and Vivado design suites to simulate and verify designs in Aldec Active-HDL and Riviera-PRO, or incorporate Aldec FPGA-based prototyping boards utilizing Virtex-7 FPGAs for hardware emulation and SoC prototyping.

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Back from DAC

Tuesday, June 11th, 2013

Functional Verification Insights from Austin

Aldec Dac 2013

I just returned  back to the office from the 50th Design Automation Conference (DAC) which took place in Austin, TX, on June 2—6. As I began compiling my trip report, I thought that I might share some of my observations, especially for those who couldn’t attend this industry event but still wanted to gain some insight.

 

 

Conference itself

One of the reasons I like DAC is that it has always been the main industry event, attracting people from all over the world, and provides participants with the opportunity to meet most of their key customers, ecosystem partners, and competitors in a single location. From an exhibitor’s perspective, DAC is mainly about engaging with attendees on the floor, learning about their current and anticipated challenges, and educating them on how they can innovate and succeed using our product offerings.

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S2C: FPGA Base prototyping- Download white paper



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