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FPGAs in an SoC World: How modern FPGA architecture influences verification methodologies

Thursday, June 1st, 2017

The SoC domination observed so far in the ASIC industry is coming to the FPGA world and changing the way FPGAs are used and FPGA projects are verified. The latest SoC FPGA devices  offer a very interesting alternative of reprogrammable logic powered with the microprocessor, usually ARM. With new types of devices there is always a need for extended verification methodology. SoC ASIC has so far been the main pioneer for advanced and highly scalable verification methodologies. Due to the complexity and size of such projects, ASIC labs were actually driving EDA vendors to deliver verification solutions for their projects.

 

With the growth of these projects, hardware emulation became a common tool which was then integrated with virtual platforms and labeled ‘hybrid co-emulation’. This hybrid solution offered a single verification platform for both software and hardware teams. Such platforms allow the performance of verification at the SoC level, allowing the entire project to be verified before the final design code is actually written and available for example, to perform the prototyping.

 

Hybrid emulation allows the connection of the work environment of software teams using virtual platforms with the hardware engineers using emulators. Why is this so important? The issue is, until now the software portion of the project worked on the virtual models, separate from the hardware portion. Connecting these two domains allows for testing of the project at the SoC level instead of the subsystems level, which in turn increases the coverage of testing and enables the detection of problems much earlier.

 

Hybrid_co-emulation_verification_system

Figure 1 – Hybrid co-emulation verification system.

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An Easier Path to Faster C with FPGAs

Monday, November 14th, 2016

For most scientists, what is inside a high-performance computing platform is a mystery. All they usually want to know is that a platform will run an advanced algorithm thrown at it. What happens when a subject matter expert creates a powerful model for an algorithm that in turn automatically generates C code that runs too slowly? FPGA experts have created an answer.

More and more, the general-purpose processor found in server-class platforms is yielding to something more optimized for the challenges of high-performance computing (HPC). Advanced algorithms like convolutional neural networks (CNNs), real-time analytics, and high-throughput sensor fusion are quickly overwhelming traditional hardware platforms. In some cases, HPC developers are turning to GPUs as co-processors and deploying parallel programming schemes – but at a massive cost in increased power consumption.

A more promising approach for workload optimization using considerably less power is hardware acceleration using FPGAs. Much as in the early days of FPGAs where they found homes in reconfigurable compute engines for signal processing tasks, technology is coming full circle and the premise is again gaining favor. The challenge with FPGA technology in the HPC community has always been how the scientist with little to no hardware background translates their favorite algorithm into a reconfigurable platform.
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FPGAs Accelerating IoT Gateway and Infrastructure Tiers

Tuesday, October 4th, 2016

The Internet of Things (IoT) has become the main topic in the technological world; it seems everybody is talking about it as the next wave in electronic systems. The scope of the IoT is so wide now, some have suggested changing the name to the Internet of Everything. We now expect all devices we use in our personal and professional lives to be connected, starting from the obvious ones in smartphones and computers, going through wearables, smart home and security devices, to industrial automation applications, and of course automotive electronics.

Creating devices for the IoT is a big challenge for engineering teams at the design and verification levels, but also at the application and data levels. As all those devices (already estimated to number in the billions, and growing) start generating their data, IoT gateways and infrastructure will need to experience a new revolution. Clouds and data farms will become a common medium not only for data storage and message exchange, but also for processing and analytics which will require much more specialized computing power.

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