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 Aldec Design and Verification

Archive for November, 2015

‘UVM Really is Everywhere’ at DVCon Europe

Wednesday, November 4th, 2015
Next week, Aldec will join other top tier organizations as a proud Silver Sponsor at DVCon Europe 2015 in Munich, Germany. There our team will offer live demonstrations of hardware-assisted verification of UVM following Doulos Ltd.’s Easier UVM guidelines. Alex Grove of Aldec will also deliver a DVCon Europe tutorial, ‘UVM Hardware Assisted Acceleration with FPGA Co-emulation’.

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CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



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