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 Aldec Design and Verification

Archive for May, 2015

The Pythonic Tonic: Miracle cure or Snake-oil?

Wednesday, May 20th, 2015

python-logoPython is making inroads in the EDA landscape, but is all the hype justified? Do the productivity benefits of a dynamic language translate to gains for real-world development for ASIC and FPGA designs? Chris Higgs of Potential Ventures will be onsite at DAC to share his experiences using Python and Aldec Riviera-PRO to take products from idea to production quickly.

Chris recently wrote a Guest Blog on the topic, visit the Aldec Design Verification Blog to learn more.

So, what does a vendor-independent simulator look like?

Friday, May 15th, 2015

blog_independent_simulator_051515Well, the short answer to that is, “Awesome”. Perhaps, as the product manager of a simulation tool, I’m a little biased. Not to discount the challenges that FPGA design teams face on daily basis, particularly with device complexities now going through the roof.

There was a time, not so long ago, when using a single FPGA device from one vendor was not so uncommon and simulation and verification were quite interchangeable terms. However in recent years, with the development of more complex FPGAs and an even more complex design process involving the use of IPs, VIPs and third party models , the need for vendor agnostic tools for simulation and verification has become more evident.


S2C: FPGA Base prototyping- Download white paper

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