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 Aldec Design and Verification
Satyam Jani
Satyam Jani
Satyam manages Aldec’s leading FPGA design entry and simulation tool – Active-HDL. He received his B.S. in Electronics Engineering from Sardar Patel University, India in 2003 and M.S in Electrical Engineering from NJIT, New Jersey in 2005. His practical engineering experience includes areas in … More »

The WHAT is mandatory but the HOW is entirely optional

September 9th, 2013 by Satyam Jani

You look confused. Perhaps I owe you an explanation. Anyone familiar with hardware design flow knows that it starts with specification and ends with implementation. The specification in this flow is the “What” – it defines what needs to be designed. The process for implementation is the “How” – it defines how you are going to achieve it.

Let’s break down just one part of the “How” or implementation – the Design Process. For many years hand-coded RTL has been used as the de facto method for implementation and it is still being used as predominant method for designing cutting-edge hardware. But does it follow that it is the most efficient method? I would say probably not, especially given the ever-growing complexity of the hardware.

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Categories: FPGA Design, SoC and ASIC Prototyping, SoC Design and Validation, Specialized Applications

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