Part Number : dwc_adc_10b205m_tsmc55lp
Short Desc. : [3423to] 10-bit, 205MSPS, 1.2V Pipeline ADC with Input Buffer in TSMC55LP
Overview :
This IP is a 10-bit 205MSPS Pipeline Dual IQ-ADC for Video and other High Speed Apllications
Features : - High Resolution, High Speed
- Input Isolation Buffer, Single Supply Operation
- Compact, Low Power
- Standard Digital CMOS with no Analog Options
- #1 provider of data conversion IP for six years in a row (Gartner, 2010)
- Over 13 years of expertise in designing differentiated data conversion solutions
- Strong application expertise in broadband wireless communications, wired communications, video, etc
- Proven ADC/DAC technology
- Extensive offering: Oversampling Sigma-Delta ADC, Pipeline ADC, SAR ADC, Current Steering DAC, and more
- Very high-performance, high-speed 12-bit @ 250 MSPS ADC and 14-bit @ 400 MSPS DAC, small area and delivering ultra low power dissipation
Categories :
Maturity : Available on request
Portability :
Type :
 Hard IP 
Foundry :
Nodes :
Process :

Deliverables : - Verilog Behavioral Model
- LEF Layout Abstract and LIB Timing Models
- GDSII Layout Database
- CDL netlist for LVS verification
- Detailed Databook, Assembly Guidelines and Full Integration Support
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL

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