AnchorHill Communications 
Part Number : AH1002
Short Desc. : DAC Correction Filter
Overview :

In sampled systems the DACs used for signal conversion from digital to analog nearly universally include a zero-order hold function of the output analog signal as part of the conversion process. The zero-order hold unavoidably applies a sin(x)/x frequency response to the output signal with the first null at the conversion sample rate frequency. 

Features : - Efficient, multiplier-free design minimizes resource utilization and power consumption
- Configurable input and output widths
- Multiple tap-length configurations including 9-tap, 7-tap, and 5-tap
- Arithmetic overflow output monitor
- Clock enable
- Output saturation prevents arithmetic rollover
- Static resettable output
- Registered input, registered output
- Clock rates over 714 MHz supported
- Includes complete simulation and verification software support suite
- Custom designs and configurations available
Categories :
Tags : DAC correction filter signal processing
Maturity : Deployed
Portability :
Type : Soft
Deliverables : - Delivered as an EDIF netlist or Xilinx ngc file, including verification test bench and other supporting test and simulation software and documentation.
- Source code is also available.
S2C: FPGA Base prototyping- Download white paper

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