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 Northwest Logic Inc. 
Short Desc. : MIPI DSI Controller Core
Overview :

The DSI Controller Core is part of Northwest Logic’s MIPI Solution. This solution is designed to achieve maximum MIPI throughput while being easy to use.

The core implements all three layers defined by the DSI Specification: Pixel to Byte Packing, Low Level Protocol, and Lane Management and is fully compliant with the DSI specification. Separate Host (Tx) and Peripheral (Rx) versions of the core are provided.

The core provides 4 data and 1 control/status packet interfaces. The data interfaces can be optional adapter to DBI-B/C and DPI interfaces. The control/status interface can be optionally adapted to an AXI interface. The core supports command and video modes, 1 to 4 data lanes at 1.5+ Gbit/s and all data types.

The core uses the byte lane clock minimizing power consumption and ensuring the core can be used in older process technologies.

The core is delivered fully integrated and verified with the user’s target MIPI PHY. Contact Northwest Logic for a complete list of supported PHYs.

The core is also provided with the MIPI Testbench which provides a MIPI Bus Functional Model.
Northwest Logic also offers a DSI Demonstration System which includes an FPGA Board, MIPI Interface Card and MIPI Display. Contact Northwest Logic for more information.

Northwest Logic also provides a complete set of quick-turn design services including IP Customization and Logic, Board, Software Development services. Contact Northwest Logic for a quote.


Features : - High-performance, easy-to-use core
- Fully DSI Specification compliant
- Host (Tx) and Peripheral (Rx) versions
- 1-4 data lane support
- Supports high speed (1.5+ Gbit/s) and low power operation
- Support for all data types
- Delivered fully integrated and verified with target MIPI PHY
- 4 data and 1 control/status packet interfaces
- Optional DBI & DPI data interface and AXI control/status interface adapters
- Provided with a MIPI DSI Testbench
- Minimal ASIC gate count
- Source code available
- Customization and Integration services available
- Complete FPGA-based demonstration system available
Categories :
Portability :
 FPGA Technologis 
Altera :
APEX 20KC
APEX 20KE
APEX II
Arria GX
Arria II GX
ARRIA II GZ
ARRIA V GT
ARRIA V GX
ARRIA V GZ
ARRIA V ST
ARRIA V SX
Cyclone
Cyclone II
Cyclone III
CYCLONE III LS
CYCLONE IV GX
CYCLONE V E
CYCLONE V GT
CYCLONE V GX
CYCLONE V SE
CYCLONE V ST
CYCLONE V SX
EP5C
FLEX 10K
HardCopy
HardCopy II
HARDCOPY III
HARDCOPY IV E
HARDCOPY IV GX
HardCopy Stratix
MAX II
MAX V
Stratix
Stratix GX
Stratix II
Stratix II GX
Stratix III
STRATIX III E
Stratix IV
STRATIX IV E
STRATIX IV GT
STRATIX IV GX
STRATIX V E
STRATIX V GS
STRATIX V GT
STRATIX V GX
Xilinx :
Artix-7
Kintex-7
Kintex-7 -2L
Spartan-3
Spartan-3 XA
Spartan-3A
Spartan-3A DSP
Spartan-3A DSP XA
Spartan-3A XA
Spartan-3AN
Spartan-3E
Spartan-3E XA
Spartan-6
Spartan-6 -1L
Spartan-6 HXT
Spartan-6 LX
Spartan-6 LXT
Spartan-6 XA
Spartan-6 XC
Virtex-4
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-4 XA
Virtex-5
Virtex-5 FX
Virtex-5 FXT
Virtex-5 LX
Virtex-5 LXT
Virtex-5 SX
Virtex-5 SXT
Virtex-5 TXT
Virtex-6
Virtex-6 -1L
Virtex-6 CXT
Virtex-6 HXT
Virtex-6 LX
Virtex-6 LXT
Virtex-6 SXT
Virtex-7
Virtex-7 -2L
Virtex-7 XT
Virtex-7 XT
Virtex-7T
Virtex-II Pro
Zynq-7000

Type :
 Hard IP 
Foundry :
Common Platform
Dongbu
Fujitsu
GlobalFoundries
Huali
IBM
Intel Corporation
LFoundry
Renesas
Samsung
Silterra
SMIC
TowerJazz
TSMC
UMC
X-Fab
Nodes :
14nm
16nm
20nm
28nm
32nm
40nm
45nm
55nm
65nm
80nm
90nm
110nm
130nm
150nm
160nm
180nm
250nm
350nm

Deliverables : - Core (Netlist or Source Code)
- Testbench (Source Code)
- Complete Documentation
- Expert Technical Support & Maintenance Updates
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



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