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Short Desc. : PVIPS-SSU USB 2.0 Verification IP
Overview :
The PVIPS-HSU Verification IP provides a quick and efficient way to verify any USB 2.0 based design – Host, Device or PHY. It supports the USB 2.0 specification. It tests all layers of the USB design – PHY, Link and Protocol. PVIPS-HSU provides a complete verification solution that includes multi-language support and UVM,OVM and VMM methodology.




The PVIPS-SSU USB 2.0 Verification IP provides:

  • Bus Functional Models

  • Protocol Checker

  • Protocol Monitor

  • Scoreboard

  • Report Generator

  • Error Injector

  • Functional Coverage

  • Callback Capability


Verification IP:


  • USB 2.0 Host VIP

  • USB 2.0 Device VIP

  • USB 2.0 Interface Inspector




Test Suites:


  • USB 2.0 Host Compliance Test Suite

  • USB 2.0 Device Compliance Test Suite

  • USB 2.0 Hub Compliance Test Suite


Features : - Compliant to USB Specification Revision 2.0 (1.1 compatible)
- Bus Functional Models (BFMs) – High, Full, Low Speed USB
- Verifies Host, Device, and Hub designs
- User customizable packet generation
- Error injection capability at any layer
- Automatic handling of packets
- Supports Link Power Management (LPM)
- Supports ULPI, UTMI, D+/- interfaces
- Supports Bulk, Control, Isochronous & Interrupt Transfer
- Protocol checking and transaction logging
- Direct access to attached, powered, default, address and configured states
- Supports directed and constrained random testing
- Supports UVM & OVM Methodology
Categories :
Portability :
Type : Model
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



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