Truechip Solutions Pvt. Ltd. 
Short Desc. : AMBA AXI3 Verification IP
Overview :

Truechip's AMBA AXI3 Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® AXI3 bus of an ASIC/FPGA or SoC.

Features : - Compliant to AMBA® AXI3 specifications from ARM
- Support for all variants of AXI3
- Support for all type of AMBA AXI3 devices:
- l Master Agent
- l Slave Agent
- Strong protocol checking Bus Monitor which also provides
- statistics of the transactions
- Parameterized data and address bus
- Support for all protocol Burst Types, Burst Lengths and Response Types
- Configurable wait states on different channels
- Rich set of configuration parameters to control AXI3 functionality including constrained randomization of protocol attributes
- On-the-fly protocol checking using protocol check functions
- Call backs in Master, Slave and Bus Monitor for various evens to provide user control
- Supports unaligned data transfers
- Complete static and dynamic assertion protocol checks
- Supports wide variety of error injection scenarios
- Supports FIFO, memory and Cache Model integrated
Categories :
Tags : AMBA AXI3 Verification IP, AMBA AXI3 VIP, AMBA AXI3, AXI3, AMBA Familly
Maturity : Available
Portability :
Type : Soft
CST: Webinars Begin on February 9
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL

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