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Short Desc. :
PE-SDMMCD -- SD 3.0 / eMMC 4.51 Device Controller
The Posedge SD 3.0 / eMMC4.51 Device Controller (PE-SDMMCD300) is a highly configurable Device Controller compatible with SD Physical Layer Specification Version 3.0 and eMMC Specification Version 4.51.The PESDMMCD300 controller supports SPI, SD 1, 4 bit modes and eMMC 1, 4, 8bit modes. The Core is designed to operate at a maximum frequency of 208MHz for SD and 200MHz for eMMC. The simple and flexible interface of PESDMMCD300 controller enables the user to integrate effectively in any SOC system or with any system bus interface. The controller supports both Boot and Alternate Boot Mode Operation.
The SD 3.0 / eMMC4.51 Device Controller supports AHB Interface and works in DMA Mode of operation to transmit and receive data. The AHB Slave Interface provides the operational registers for Processor to configure the PE-SDMMCD300 controller. This controller also adds the flexibility to connect the Flash memory with all inputs as required.
The (PE-SDMMCD300) SD 3.0 / eMMC4.51 Device Controller Core is designed for low power, high performance, less gate count making it ideal for low-power and high-performance applications. The core was tested using rigorous verification methodology, consisting of directed tests, constrained random verification, and Error Injection cases.
The (PE-SDMMCD300) SD 3.0 / eMMC4.51 Device Controller Core has a very simple firmware interface. The core comes with an optimized software programming model, allowing any customer to meet their high system performance requirement while maintaining low CPU overhead. The architecture supports all security features such as Card Lock Password protection, Write Protection and also an optional Authentication based Content Protection. Cyclic Redundancy Code (CRC) Integrity checking is handled in Hardware. CRC7 is used for Command and CRC16 is for Data Integrity.
- Compliant with SD Physical Layer Specification 3.0,AMBA Specification 2.0,eMMC Specification 4.51
- Supports SD Bus Width 1-bit, 4-bit 8 bit mode , SPI Mode and MMC Bus Width 1/4/8.
- Supports SD Single Data Rate and Dual Data Rate modes (SDR12, SDR25, SDR50, SDR104, DDR50).
- Supports MMC Dual Data Transfer.
- Supports Boot Mode and Alternate Boot Mode.
- Supports SD Memory Access Up to 2TB (SDXC).
- Supports SDXC, SDHC, MMC plus, MMC Mobile Cards.
- Supports CMD20 for Speed Class Recording.
- Supports Password Protection of Cards.
- Supports Secure Erase Mechanism.
- Supports Built-in write protection features.
- Supports Multiple User Data Partition with Enhanced User Data Area options
- Supports Replay Protected Memory Block.
- Supports DMA operation for high speed data transfer.
- Configurable 32-bit FIFO buffers (512B – 2kB).
- Dual-Buffer mode optimizes throughput.
- Data Transfer Rate – Up to 832Mbps.Clock – SD - 208 MHz / MMC-200MHz,AHB Clock – Up to 300MHz (process dependent)
- Support lock mode , sleep mode, boot mode , alternate mode , stream mode.
- Support clock tuning.
- Lowest Gate Count. 31k ( 1k Ram (256x32) for data and register)
- Complete Solution – IP, HW & SW Development Kit, Onsite support.
- Lowest Power / Highest Performance at System Level.
- Scalable Architecture, Multiple Interface Options.
- Application Level Expertise.
- World Class Professional Support.
- Fully synthesizable RTL.
- Unencrypted Source Code.
- Self-checking Testbench and Testcases.
- Verification specification.
- Simulation Scripts –NC-Verilog, VCS, Modelsim Questa.
- ASIC/FPGA synthesis scripts.
- Loopback Client Driver.
- SD3.0 /eMMC 4.51 Host Driver.
- User documentation.
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