||- Compliant with ETSI 301 545-2 V1.1.1 (2012-01) (DVB-RCS2).
- Support for all turbo code block lengths and code rates as defined by the standard.
- Support for all modulation schemes (QPSK, 8-PSK, 16-QAM).
- Design-time configuration of throughput for optimal resource utilization.
- Low-power and low-complexity design.
- Burst-to-burst on-the-fly configuration.
- High block length and code rate granularity.
- Configurable amount of turbo decoder iterations for trading-off throughput and error correction performance.
- Legacy DVB-RCS support on request.
- Allows for turbo synchronization to further improve error correction performance.
- Available for ASIC and FPGAs (Xilinx, Altera).
- Deliverable includes VHDL source code or synthesized netlist, VHDL or SystemC testbench, and bit-accurate Matlab, C or C++ simulation model.