Mercora Technologies 
Short Desc. : HMAC SHA-384 Fast IP Core (Xilinx)
Overview :
The HMAC SHA-384 Fast IP Core provides a hardware implementation of the Keyed-Hash Message Authentication Code (HMAC) for the SHA-384 hash algorithm. The Fast IP Core provides a balance between high throughput and size and comes with a 64/384-bit IO interface. The HMAC SHA-384 can accept messages up to 2^128-1024 bits in length and returns a 384-bit message digest. For additional security the core integrates a quick key wipe feature allowing the key to be erased both fast and securely.

The core is designed for applications that need high throughput, low latency, and reduced power consumption.
Features : - Implements HMAC SHA-384 keyed-hash message authentication specified by NIST FIPS 190-1
- Synchronous 64/384-bit IO interface (byte oriented)
- Pre-computation of internal key state for reduced latency
- High throughput requires only 83* clock cycles per 1024-bit hash block
- Small hardware footprint for reduced power consumption
- Quick key wipe for anti-tamper applications
Categories :
Portability :
Type : Soft
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL

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