VeriSilicon Holdings Co., Ltd. 
Short Desc. : I65GV25_POR_03---IBM 65nm SF 3.3V/1.0V Power on Reset
Overview :
The present Power-On-Reset circuit generates system reset pulses (RST) when both the 3.3V and 1.0V power suppliers are turned on. The output signal RST1P0 and RST33 will equal to V1P0 and V33 respectively when either power supply is turned off. No external device is needed.
Features : - Power Supply: 3.3v±10%, 1.0v±10%
- Process: IBM 65nm 3.3/1.0V (CMOS 10SF) (used device: dgnfet, dgpfet, dgxnfet, dgxpfet, nfet, pfet, dgncap)
- Operating junction temperature: -40°C~+25°C~+125°C
- Operating current when stable: less than 3uA
- More details, please go to below website to contact VeriSilicon location sales : http://www.verisilicon.com/en/contactus.asp
Categories :
Portability :
Type : Hard
S2C: FPGA Base prototyping- Download white paper

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