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Part Number : PCE03L
Overview :
The PCE03L is an 8 state 3GPPTM LTE [1] compatible turbo encoder. Encoded data is output in parallel for increased speed. The LTE turbo code uses two 8 state systematic recursive convolutional code. The interleaver uses a simple quadratic permutation interleaver.
Features : - 8 state 3GPPTM LTE compatible turbo encoder
- Rate 1/3
- 40 to 6144 bit interleaver
- Up to 222 Mbit/s encoding speed
- Parallel encoded data out
- 218, 218 and 129 slices for Spartan–3A, Virtex–4 and Virtex–5, respectively. Other Xilinx devices also supported.
- Available as EDIF core and VHDL simulation core for Xilinx FPGAs under SignOnce IP
- License. Actel, Altera and Lattice FPGA cores available on request.
- Available as VHDL core for ASICs
- Low cost university license also available
Categories :
Portability :
Type : Soft
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



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