SmartDV Technologies 
Short Desc. : Fiber Channel
Overview :
Fiber Channerl Verification IP provides an smart way to verify the Fiber channel MAC, PCS and serdes of a SOC or a ASIC. The SmartDV's Fiber Channel verification IP is fully compliant with standard Fiber channel Specification and provides the following features.
Features : - Supports generation all types of FC frames
- Supports verification of all layers of fiber channel.
- Support following interfaces
- 10 or 20 bit Phy interfaces
- 8 bit Encoder / Decoder interface
- 32 bit Dword Primitive interface
- Dword level transport interface
- Complete Frame transaction level interface
- Supports injection of errors at each layer
- Invalid frame fields
- Invalid eof and sof injection
- Oversize and undersize frames
- disparity errors
- Invalid code group errors
- Invalid K and D character injection
- CRC error injection
- Retry control
- Support Port Login and Process Login
- A single Initiator can communicate with multiple Targets.
- Supports multi LUN addressing
- Supports speeds up to 16G
Categories :
Portability :
Type : Soft
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers

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