SmartDV Technologies 
Short Desc. : Ethernet VIP
Overview :
The 10/100/1G/10G/40G/100G Ethernet Verification IP is compliant with IEEE 802.3 specifications and verifies MAC-to-PHY and PHY-to-MAC layer interfaces of designs with a 10/100/1G/10G/40G/100G Ethernet interface. It can work with SystemVerilog,Vera, SystemC, E and Verilog HDL environment. Ethernet VIP is developed by experts in Ethernet, who have developed ethernet products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a ethenet product.
Features : - Support MDIO slave and master model
- Supports all types of TX and RX errors insertion/detection at each layer.
- Comes with Tx BFM, Rx BFM, and Monitor
- Monitor supports detection of all protocol violations
- Supports Pause frame generation and detection
- Built in coverage analysis
- Callbacks in master and slave for various events
- Status counters for various events in bus
Categories :
Portability :
Type : Soft
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper

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