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MIPS Technologies Inc.
Short Desc. :
The MIPS32® 1074K™ Coherent Processing System (CPS) is the latest coherent
multiprocessor IP offering from MIPS Technologies. The 1074K CPS sets a new
standard of performance within MIPS’ portfolio of licensable processor core IP,
delivering over 15,000 CoreMark and up to 12,000 DMIPS in 40nm technology at
1.5 GHz (worst case slow corner conditions with production margins).
- A complete system for coherent multiprocessing, including:
- 1 to 4 1074K “base” cores
- – 1074K base core = 74K superscalar, out-of-order high-performance processor with 15-stage pipeline, and cache coherence structures added for interface to Coherence Management unit
- Coherence Management (CM) unit – high throughput coherence fabric supporting 256-bit wide buses internally on key datapaths, as well as external read and write data interfaces to L2 cash and through to rest of system logic in SoC implementation
- I/O Coherence Unit (IOCU) – hardware acceleration for I/O coherence, offloading software implementation on CPUs
- Cluster Power Controller (CPC) – multicore power gating, clock gating, and reset
- Global Interrupt Controller (GIC) – system and inter-processor interrupt controller
- EJTAG/PDtrace™ block for advanced debug/trace of complete coherent system
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