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Aizyc UART IP is compact low power and scalable IP core.
High performance Aizyc UART IP core is complaint to 16C450 and 16C550 Universal Asynchronous Receiver/Transmitter. This IP has deep FIFOs to achieve higher performance and throughput.
The Standard VCI (Virtual Component Interface) bus interface provided with the core makes integration easy into any design.
The IP core is portable to an ASIC or a FPGA. It has been validated on Xilinx platform.
Along with the IP core, we will provide complete test environment with constraint randomized test cases and our full support during integration.
- 16C450/16C550 compatible UART
- Supports RS232 modes
- Bi-directional Speeds configurable from 50 bps to 115200 bps
- Full Serial modem control
- Supports Hardware as well as Software flow control
- 5, 6, 7, 8 bit serial format support
- Even, Odd, None, Space & Mark parity supported
- Transmit/Receive FIFO
- • Status report capability
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