Short Desc. : ZBT SRAM Controller
Overview :
This hardware IP core is a ZBT SRAM controller capable of automatically managing single address and full continuous burst read/writes to ZBT SRAM memory chips.
Features : - Customizable to any ZBT SRAM memory chip combination.
- Customizable to any FPGA bus (Wishbone, AMBA, OPB, etc.).
- Continuous burst reads/writes.
- Single cycle reads/writes.
- Individual byte enables.
Categories :
Portability :
Type : Hard
S2C: FPGA Base prototyping- Download white paper

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