ExpertIO, Inc. 
Short Desc. : PCI Express SVC
Overview :
The PCI Express (PCIe) System Verification Component (SVC) is designed to help you thoroughly verify your design using both random and directed simulation. The PCIe SVC supports constrained randomization parameters throughout the layers to aid in coverage during testing.
Features : - Root Complex and Endpoint models
- Optional switch model
- Support separate for host and target memories
- Selection of PIPE, PCS/PMA level, or SERDES interfaces
- Support for Gen 1, 2 and 3, including SSC
- Full link speed and width negotiation up to 32 Lanes
- User interfaces for capturing sent and received packets for external scoreboard use
- Automated Error Injections at all layers
- Scalable for multiple instantiations in a test bench for testing multi-port hosts or devices
Categories :
Portability :
Type : Soft
S2C: FPGA Base prototyping- Download white paper
TrueCircuits: UltraPLL

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