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 Aeroflex Gaisler 
Part Number : LEON4
Overview :
The LEON4 processor core is a synthesizable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The core is highly configurable and particularly suitable for high performance multi-core system-on-a-chip (SOC) designs.
Features : - SPARC V8 instruction set with V8e extensions
- Advanced 7-stage pipeline, with branch prediction
- 64-bit single-clock load/store operation
- 64-bit 4-port register file
- Hardware multiply, divide and MAC units
- High-performance, fully pipelined IEEE-754 FPU
- Separate instruction and data L1 cache (Harvard architecture) with snooping
- Configurable caches L1: 1 - 4 ways, 1 - 256 kbytes/way. Random, LRR or LRU replacement
- Configurable L2 cache: 256-bit internal, 1-4 ways, 16 Kbyte - 8 Mbyte
- SPARC Reference MMU (SRMMU) with configurable TLB
- AMBA-2.0 AHB bus interface, 64- or 128-bit wide
Categories :
Portability :
Type : Soft
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