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Part Number : tb_vit_dec7
Short Desc. : Viterbi K=7 tail-biting decoder for WiMAX
Features : - K=7 (64 states), G0=171(octal), G1=133(octal).
- Rate ½. Other rates can be supplied by external puncturing.
- Algorithm radix of 1 or 2 output bits per clock.
- Parameterizable soft input width.
- Parameterizable trace back length.
- On the fly configurable trace back length, to support low latency.
- Supports tail biting.
- Throughput > 155 Mbit/sec on FPGA (with both 1 and 2 output bits versions).
- Area/Power efficient architecture utilizing RAM for trace back storage.
- Memory type (SRAM / register file), supports Altera/Xilinx coding style for easy synthesis.
- All-synchronous design using a single clock, except for global asynchronous reset.
- Available as verilog source code or as netlist.
- Silicon proven. FPGA proven.
Categories :
Portability :
Type : Soft
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