VeriSilicon Holdings Co., Ltd. 
Part Number : S13V33_PLL_05D
Overview :
This PLL is designed for audio clock generation. The reference clock is either 12MHz crystal or the input clock. It supports 256*fs and 128*fs clock output, where fs is the audio system’s sample rate of 8k/11k/12k/16k/22k/24k/32kHz/44.1kHz/48kHz/192k. It integrates a phase frequency detector (PFD), a loop filter (LP), a voltage control oscillator (VCO), a current reference, two programmable dividers and other supportive circuits.
Features : - Process: SMIC 0.13um Logic 1P8M 1.2V/3.3V CMOS process
- Supply voltage: 3.3v +/-10%; 1.2v+/-10%
- Reference input: 12MHz crystal or external clock
- Clock output: 24.572MHz, 12.286MHz, 11.294MHz, 8.190MHz,6.143MHz, 5.647MHz, 4.095MHz, 3.071MHz, 2.823MHz, 2.048MHz
- Output duty cycle: 49~51%
- Current: less than 1.5mA
- Operating temperature: -40~125°C
Categories :
Portability :
Type : Hard
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