ChipX Inc. 
Short Desc. : PCI Express Controller
Overview :
PCI Express controller cores are available as Soft IP from ChipX for inclusion in your design. The PCI Express controller core supports 1, 4, or 8 lanes and implements all protocol layers (Physical, Data Link and Transaction). The core supports root port, bridge or endpoint and interfaces to the PHY using the Intel PIPE interface.
Features : - x1, x4, x8 Lanes
- Root Port, Endpoint, Shared Silicon (RP / EP) configurations
- PCI Express 1.1 compliant
- Supports
- Intel PIPE
- (8-bit 250 MHz & 16-BIT 125 MHz)
- PCS to FPGA technology
- Virtual Channels: 1-8(client determines credits for each)
- Maximum Payload Size: 128 Bytes to 4K Bytes
- Implements all three Protocol layers (Transaction, Data, Physical)
- Outstanding requests: 2-256
- Implements all standard Configuration Space registers
- Configurable Receive and Retry buffer sizes
Categories :
Portability :
Type : Soft
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S2C: FPGA Base prototyping- Download white paper

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