Salamander Error Correction 
Part Number : SAL50101D
Overview :
The SAL50101D consists of verilog IP for
decoding the 8-state turbo code defined by the
WiMAX standard.
The decoder takes in 6-bit values for the
unencoded (“systematic”) data and a number of
parity values, depending on the code rate.
Some of the parity values are the result of
encoding the data with a simple convolutional
encoder and some are the result of encoding a
permutation of the data through an identical
simple convolutional encoder. The data are
operated on iteratively by the Soft Output
Viterbi Algorithm (SOVA) decoder module,
first looking at the normal ordered data and
parity, then looking at the interleaved
sequence and parity. At each step in the
process a correction factor is refined and stored
as “extrinsic” data for use in the following step.
Features : - For use in WiMAX systems. Fully compliant with the WiMAX standard IEEE std 802.16-2004
- Generic memory interface for easy ASIC integration
- Simple handshake protocol for reliable interfacing
- Fully synchronous design
- FullWiMAX compliant hardware
- interleaver. No external calculation required.
- Interleaver frame size selectable on a frame-by-frame basis
- All defined block sizes supported
- Comprehensive verification plan provided
- All defined rates (1/2, 2/3, 3/4, 5/6, 7/ supported
Categories :
Portability :
Type : Soft

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